EN25F40A
EN25F40A
4 Megabit Serial Flash Memory with 4Kbyte Uniform Sector
FEATURES
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Single power supply operation
- Full voltage range: 2.7-3.6 volt
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Serial Interface Architecture
- SPI Compatible: Mode 0 and Mode 3
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4 M-bit Serial Flash
- 4 M-bit/512 K-byte/2,048 pages
- 256 bytes per programmable page
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Standard, Dual or Quad SPI
Standard SPI: CLK, CS#, DI, DO, WP#, HOLD#
Dual SPI: CLK, CS#, DQ
0
, DQ
1
, WP#, HOLD#
Quad SPI: CLK, CS#, DQ
0
, DQ
1
, DQ
2
, DQ
3
High performance
104MHz clock rate for Standard SPI
104MHz clock rate for two data bits
104MHz clock rate for four data bits
Low power consumption
10mA typical active current
1
µA
typical power down current
Uniform Sector Architecture:
128 sectors of 4-Kbyte
16 blocks of 32-Kbyte
8 blocks of 64-Kbyte
Any sector or block can be erased individually
- Write Protect all or portion of memory via
software
- Enable/Disable protection with WP# pin
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High performance program/erase speed
- Page program time: 0.8ms typical
- Sector erase time: 30ms typical
- 32KB Block erase time 100ms typical
- 64KB Block erase time 200ms typical
- Chip erase time: 1.5 seconds typical
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Lockable 512 byte OTP security sector
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Support Serial Flash Discoverable Parameters
(SFDP) signature
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Read Unique ID Number
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Minimum 100K endurance cycle
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Data retention time 20years
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Package Options
8 pins SOP 150mil body width
8 pins VSOP 150mil body width
8 contact USON 2x3 mm
8 contact VDFN 5x6 mm
All Pb-free packages are compliant RoHS,
Halogen-Free and REACH.
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Industrial temperature Range
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Software and Hardware Write Protection:
GENERAL DESCRIPTION
The EN25F40A is a 4 Megabit (512 K-byte) Serial Flash memory, with enhanced write protection
mechanisms. The EN25F40A supports the standard Serial Peripheral Interface (SPI), and a high
performance Dual/Quad output as well as Dual/Quad I/O using SPI pins: Serial Clock, Chip Select,
Serial DQ
0
(DI), DQ
1
(DO), DQ
2
(WP#) and DQ
3
(HOLD#). SPI clock frequencies of up to 104MHz are
supported allowing equivalent clock rates of 208MHz (104MHz x 2) for Dual Output and 416MHz
(104MHz x 4) for Quad Output when using the Dual/Quad I/O Fast Read instructions. The memory can
be programmed 1 to 256 bytes at a time, using the Page Program instruction.
The EN25F40A is designed to allow either single
Sector/Block
at a time or full chip erase operation. The
EN25F40A can be configured to protect part of the memory as the software protected mode. The device
can sustain a minimum of 100K program/erase cycles on each sector
or block.
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
1
Elite Semiconductor Memory Technology Inc.
Rev. D, Issue Date: 2017/02/13
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
