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C9810AYB 参数 Datasheet PDF下载

C9810AYB图片预览
型号: C9810AYB
PDF下载: 下载PDF文件 查看货源
内容描述: [Processor Specific Clock Generator, CMOS, PDSO48, SSOP-48]
分类和应用: 光电二极管外围集成电路
文件页数/大小: 15 页 / 332 K
品牌: CYPRESS [ CYPRESS ]
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+/+…when timing is critical  
C9810  
Low EMI Clock Generator for Intel 810 Chipset for Mobile Applications  
Advanced Information  
IMI Confidential  
Power on Bi-Directional Pins  
Power Up Condition:  
Pin 48 (REL2/REF) is a Power up bi-directional pin and is used for selecting the host frequency in page 1, table 1.  
During power-up of the device, this pin is in input mode (see Fig 4, below), therefore; it is considered input select pins  
internal to the IC. After a settling time, the selection data is latch into the internal control register and this pin becomes a  
clock output.  
VDD RAIL  
POWER SUPPLY  
RAMP  
REF / SEL2  
(Pin 1)  
-
Hi-Z INPUTS  
TOGGLE OUTPUTS  
SELECT DATA IS LATCHED INTO REGISTER THEN PIN BECOMES A REF CLOCK OUTPUT SIGNAL  
Fig.4  
Vdd  
Strapping Resistor Options:  
See D escription  
R up  
10K  
The power up bi-directional pins have a large value pull-  
up each (250KΩ), therefore, a selection “1” is the  
default. If the system uses a slow power supply (over  
5mS settling time), then it is recommended to use an  
external Pull-up (Rup) in order to insure a high  
selection. In this case, the designer may choose one of  
two configurations, see Fig.5A and B.  
IM I C 9810  
R d  
Load  
Bidirectional  
JP1  
JU MPER  
Fig. 5A  
R dn  
10K  
Fig. 5A represents an additional pull up resistor 50KΩ  
connected from the pin to the power line, which allows a  
faster pull to a high level.  
If a selection “0” is desired, then a jumper is placed on  
JP1 to a 5Kresistor as implemented as shown in  
Fig.5A. Please note the selection resistors (Rup and  
Rdn) are placed before the Damping resistor (Rd)  
close to the pin.  
JP2  
3 W ay Jum per  
Vdd  
3
2
1
Fig. 5B represent a single resistor 10Kconnected to a  
3-way jumper, JP2. When a “1” selection is desired, a  
jumper is placed between leads1 and 3. When a “0”  
selection is desired, a jumper is placed between leads 1  
and 2.  
R sel  
10K  
IM I C 9810  
R d  
Load  
Bidirectional  
Fig. 5B  
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.  
MILPITAS, CA 95035, USA TEL: 408-263-6300, FAX 408-263-6571  
Rev 0.4  
8/31/1999  
Page 5 of 15  
http://www.imicorp.com