+/+…when timing is critical
C9810
Low EMI Clock Generator for Intel 810 Chipset for Mobile Applications
Advanced Information
IMI Confidential
Pin Description
PIN No.
Pin Name
PWR
I/O TYPE
Description
48
VDD
I/O
3.3V 14.318 MHz clock output. This Is a power on bi-directional
pin. During power up, this pin is an input “SEL2” for setting the
CPU frequency (see table1, page 1) (see app not, page 5).
When the power reaches the rail, this pin becomes a buffered
output of the signal applied at Xin (typically 14.318 MHz).
SEL2/REF
2
VDD
VDD
VDD
I
O
O
OSC1 14.318MHz Crystal input
XIN
XOUT
PCI(0:6)
3
10, 11, 12,
14, 15, 17,
18
14.318MHz Crystal output
3.3V PCI clock outputs. Synchronous to CPU clock. See fig. 3,
page 4.
6, 7
23
24
26, 27
VDD
VDD
VDD
VDD
O
O
O
I
3.3V Fixed 66.6 MHz clock outputs
3.3V Fixed 48 MHz clock outputs
3.3V Fixed 48 MHz clock outputs
3.3V LVTTL compatible inputs for logic selection. Each input
has an internal pull-up (Typ. 250KΩ)
3V66(0:1)
USB
DOT
SEL(0,1)
28
29
30
VDD
VDD
VDD
I
I
I
SDATA
SCLK
PWR_DWN#
I²C compatible SDATA input. Has an internal pull-up (>100KΩ)
I²C compatible SCLK input. Has an internal pull-up (>100KΩ)
3.3V LVTTL compatible input. Device enters powerdown mode
When held LOW. Has an internal pull-up (typically 250 k).
3.3V SDRAM clock outputs. See table1, page 1 for frequency
table.
2.5V Host bus clock outputs. See table 1, page 1 for frequency
selection.
2.5V clock IOAPIC outputs. They are synchronous to CPU
clock and fixed at 33.3 MHz. See figure 3, page 4.
3.3V Power Supply
38, 37, 32,
33, 35
42, 41
VDDS
VDDC
VDDI
O
O
O
SDRAM(0:3)
DCLK
CPU(1:2)
46, 45
IOAPIC(0,1)
1
20
21
43
4
39, 34
40
31, 36
25
-
-
-
-
-
-
VDD
Analog circuitry 3.3V Power Supply
Analog circuitry Ground.
2.5V Power Supply’s for CPU (1:2) clock outputs.
Common Ground pin.
VDDA
VSSA
VDDC
VSS
-
-
3.3V power support for SDRAM clock output.
Ground pin for CPU (1:2) clock outputs.
Ground pins for SDRAM and DCLK clock outputs.
3.3V power supply for 48 MHz (0:1) clock outputs.
Ground return for 48 MHz (0:1) clock outputs.
3.3V power supply for PCI (0:6) clock outputs.
Ground return for PCI (0:6) clock outputs.
3.3V power supply for 3V66 (0:1) output clocks
Ground return for 3V66 (0:1) clock outputs.
2.5V power supply for IOAPIC (0:1) clock outputs.
Ground return for IOAPIC (0:1) clock outputs.
VDDS
VSSC
VSSS
VDD48
VSS48
VDDP
VSSP
VDD66
VSS66
VDDI
22
9, 19
16, 13
8
5
44
-
-
-
-
47
VSSI
A bypass capacitor (0.1µF) should be placed as close as possible to each positive power pin. If these bypass capacitors
are not close to the pins their high frequency filtering characteristic will be cancelled by the lead inductance of the traces.
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
MILPITAS, CA 95035, USA TEL: 408-263-6300, FAX 408-263-6571
Rev 0.4
8/31/1999
Page 2 of 15
http://www.imicorp.com
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