P R E L I M I N A R Y
CONNECTION DIAGRAM
73-Ball FBGA
Top View
Flash only
A1
A10
NC
NC
Pseudo
SRAM only
B1
B5
NC
C5
B6
B10
NC
NC
NC
Shared
C1
C3
C4
C6
C7
C8
NC
A7
LB# WP#/ACC WE#
A8
A11
D2
A3
D3
A6
D4
D5
D6
D7
A19
E7
A9
D8
A12
E8
A13
F8
D9
A15
E9
NC
F9
NC
UB# RESET# CE2s
E5
E2
A2
E3
A5
E4
E6
A18 RY/BY# A20
F1
NC
G1
NC
F2
A1
F3
A4
F4
A17
G4
DQ1
F7
F10
A10
G7
DQ6
H7
A14
G8
NC
NC
G2
A0
G3
G9 G10
V
SS
A16
NC
H2
CE#f
J2
H3
OE#
J3
H4
DQ9
J4
H5
DQ3
J5
H6
DQ4
J6
H8
H9
DQ13 DQ15/A-1 CIOf
J7
DQ12
K7
J8
DQ7
K8
J9
V
CC
f
V s
CC
CE1#s DQ0
DQ10
K4
V
SS
K3
K5
DQ11
L5
K6
NC
L6
NC
DQ8
DQ2
DQ5
DQ14
L1
NC
M1
NC
L10
NC
NC
M10
NC
package and/or data integrity may be compromised if
the package body is exposed to temperatures above
150°C for prolonged periods of time.
Special Package Handling Instructions
Special handling is required for Flash Memory products
in molded packages (TSOP, SO, PDIP, PLCC). The
July 19, 2002
Am49DL32xBG
7
CYPRESS [ CYPRESS ]
