欢迎访问ic37.com |
会员登录 免费注册
发布采购

5962-9759802QYA 参数 Datasheet PDF下载

5962-9759802QYA图片预览
型号: 5962-9759802QYA
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash PLD, 19ns, 128-Cell, CMOS, CQCC84, CERAMIC, LCC-84]
分类和应用: 时钟输入元件可编程逻辑
文件页数/大小: 17 页 / 640 K
品牌: CYPRESS [ CYPRESS ]
 浏览型号5962-9759802QYA的Datasheet PDF文件第2页浏览型号5962-9759802QYA的Datasheet PDF文件第3页浏览型号5962-9759802QYA的Datasheet PDF文件第4页浏览型号5962-9759802QYA的Datasheet PDF文件第5页浏览型号5962-9759802QYA的Datasheet PDF文件第7页浏览型号5962-9759802QYA的Datasheet PDF文件第8页浏览型号5962-9759802QYA的Datasheet PDF文件第9页浏览型号5962-9759802QYA的Datasheet PDF文件第10页  
CY7C375i  
Electrical Characteristics Over the Operating Range[3, 4]  
Parameter  
Description  
Test Conditions  
VCC = Min. IOH = 3.2 mA (Coml/Ind)[5]  
IOH = 2.0 mA (Mil)  
Min. Typ. Max. Unit  
VOH  
Output HIGH Voltage  
2.4  
V
V
VOHZ  
VOL  
Output HIGH Voltage  
with Output Disabled[9]  
VCC = Max. IOH = 0 µA (Coml/Ind)[5, 6]  
IOH = 50 µA (Coml/Ind)[5, 6]  
VCC = Min. IOL = 16 mA (Coml/Ind)[5]  
IOL = 12 mA (Mil)  
4.0  
3.6  
0.5  
V
V
Output LOW Voltage  
V
V
VIH  
VIL  
IIX  
Input HIGH Voltage  
Input LOW Voltage  
Input Load Current  
Guaranteed Input Logical HIGH voltage for all inputs[7] 2.0  
Guaranteed Input Logical LOW voltage for all inputs[7] 0.5  
7.0  
0.8  
V
V
VI = Internal GND, VI = VCC  
10  
+10  
µA  
µA  
µA  
mA  
IOZ  
Output Leakage Current VCC = Max., VO = GND or VO = VCC, Output Disabled 50  
+50  
VCC = Max., VO = 3.3V, Output Disabled[6]  
0
70 125  
160  
IOS  
ICC  
Output Short  
VCC = Max., VOUT = 0.5V  
30  
Circuit Current[8, 9]  
Power Supply  
Current[10]  
VCC = Max., IOUT = 0 mA,  
f = 1 MHz, VIN = GND, VCC  
Coml/Ind.  
125  
75  
200  
125  
250  
mA  
mA  
mA  
µA  
Coml L” –66  
Military  
125  
IBHL  
Input Bus Hold LOW  
Sustaining Current  
VCC = Min., VIL = 0.8V  
VCC = Min., VIH = 2.0V  
VCC = Max.  
+75  
IBHH  
Input Bus Hold HIGH  
Sustaining Current  
75  
µA  
µA  
µA  
IBHLO  
IBHHO  
Input Bus Hold LOW  
Overdrive Current  
+500  
Input Bus Hold HIGH  
Overdrive Current  
VCC = Max.  
500  
Capacitance[9]  
Parameter  
Description  
Test Conditions  
Min.  
Max.  
Unit  
[11]  
CI/O  
Input/Output Capacitance  
Clock Signal Capacitance  
VIN = 5.0V at f=1 MHz  
VIN = 5.0V at f = 1 MHz  
8
pF  
pF  
CCLK  
5
12  
Notes:  
3. See the last page of this specification for Group A subgroup testing information.  
4. If VCCIO is not specified, the device can be operating in either 3.3V or 5V I/O mode; VCC=VCCINT  
.
5. IOH = 2 mA, IOL = 2 mA for SDO.  
6. When the I/O is three-stated, the bus-hold circuit can weakly pull the I/O to a maximum of 4.0V if no leakage current is allowed. This voltage is lowered significantly  
by a small leakage current. Note that all I/Os are three-stated during ISR programming. Refer to the application note Understanding Bus Holdfor additional  
information.  
7. These are absolute values with respect to device ground. All overshoots due to system or tester noise are included.  
8. Not more than one output should be tested at a time. Duration of the short circuit should not exceed 1 second. VOUT = 0.5V has been chosen to avoid test  
problems caused by tester ground degradation.  
9. Tested initially and after any design or process changes that may affect these parameters.  
10. Measured with 16-bit counter programmed into each logic block.  
11. CI/O for dedicated inputs, and for I/O pins with JTAG functionality is 12 pF,and for the ISREN pin is 15 pF Max.  
Document #: 38-03029 Rev. **  
Page 6 of 17