欢迎访问ic37.com |
会员登录 免费注册
发布采购

CS5171GD8 参数 Datasheet PDF下载

CS5171GD8图片预览
型号: CS5171GD8
PDF下载: 下载PDF文件 查看货源
内容描述: [Switching Regulator, Current-mode, 1.5A, 305kHz Switching Freq-Max, PDSO8, 0.150 INCH, SO-8]
分类和应用: 开关光电二极管
文件页数/大小: 16 页 / 189 K
品牌: CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
 浏览型号CS5171GD8的Datasheet PDF文件第5页浏览型号CS5171GD8的Datasheet PDF文件第6页浏览型号CS5171GD8的Datasheet PDF文件第7页浏览型号CS5171GD8的Datasheet PDF文件第8页浏览型号CS5171GD8的Datasheet PDF文件第10页浏览型号CS5171GD8的Datasheet PDF文件第11页浏览型号CS5171GD8的Datasheet PDF文件第12页浏览型号CS5171GD8的Datasheet PDF文件第13页  
Application Information: continued  
The phase lead provided by this zero ensures that the loop  
where:  
N = transformer turns ratio primary over secondary.  
has at least 45° phase margin at the cross-over frequency.  
Therefore, this zero shall be placed close to the pole gener-  
ated in the power stage which can be identified at fre-  
quency:  
When the power switch turns off, there exists a voltage  
spike superimposed on top of the steady–state voltage.  
Usually this voltage spike is caused by transformer leakage  
inductance charging stray capacitance between the VSW  
and PGnd pins. To prevent the voltage at the VSW pin from  
exceeding the maximum rating, a transient voltage sup-  
pressor in series with a diode is paralleled with the pri-  
mary windings. Another method of clamping switch volt-  
age is to connect a transient voltage suppressor between  
the VSW pin and ground.  
1
fP =  
2πCORLOAD  
where:  
CO = equivalent output capacitance of the error amplifier  
120pF;  
RLOAD= load resistance.  
The second pole, fP2, located at high frequency range, can  
be placed at the output filter’s ESR zero or half the switch-  
ing frequency to cut down the switching noises. The fre-  
quency of this pole is determined by the value of C2 and  
R1:  
Magnetic Component Selection  
When choosing a magnetic component, one must consider  
factors such as peak current, core and ferrite material, out-  
put voltage ripple, EMI, temperature range, physical size  
and cost. In boost circuits, the average inductor current is  
output current times voltage gain (VOUT/VCC), assuming  
100% energy transfer efficiency. In continuous conduction  
mode, inductor ripple current is  
1
fP2  
=
2πC2R1  
One simple method to the ensure adequate phase margin  
is to design the frequency response tilted at 20dB/dec  
slope all the way to unity-gain crossover. The cross-over  
frequency shall be selected at the midpoint between fZ1 and  
VCC(VOUT – VCC  
)
IRIPPLE  
=
(f)(L)(VOUT  
)
fP2 where the phase margin is maximized.  
where:  
f = 270kHz  
The peak inductor current is equal to average current plus  
half of the ripple current, which should not cause inductor  
saturation. The above equation can also be referenced on  
selecting the value of the inductor based on the tolerance  
of the ripple current in the circuits. Small ripple current  
provides the benefits of small input capacitors and greater  
output current capability. A core geometry like a rod or  
barrel is prone to generating high magnetic field radiation,  
but is relatively cheap and small. Other core geometry,  
such as a toroid, provides a closed magnetic loop to pre-  
vent EMI.  
fp1  
fz1  
fp2  
Frequency (LOG)  
Input Capacitor Selection  
Figure 6. Bode plot of the compensation network shown in Figure 6.  
VSW Voltage Limit  
In the boost circuit the VSW pin maximum voltage is set by  
the maximum output voltage plus output diode forward  
voltage. The diode forward voltage is typically 0.5V for  
Schottky diodes and 0.8V for ultrafast recovery diodes  
VSW(MAX) = VOUT(MAX) + VF  
where:  
1: Input voltage VCC ripple (AC coupled)  
2: Input Current IIN  
3: Inductor Current IL  
VF = output diode forward voltage.  
In the flyback circuit, the peak VSW voltage is governed by:  
Figure 7a: Boost input voltage and current ripple waveforms.  
VSW(MAX) = VCC(MAX) + (VOUT + VF) × N  
9