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NE5550279A-A 参数 Datasheet PDF下载

NE5550279A-A图片预览
型号: NE5550279A-A
PDF下载: 下载PDF文件 查看货源
内容描述: [Silicon Power LDMOS FET]
分类和应用: 晶体管
文件页数/大小: 8 页 / 772 K
品牌: CEL [ CALIFORNIA EASTERN LABS ]
 浏览型号NE5550279A-A的Datasheet PDF文件第1页浏览型号NE5550279A-A的Datasheet PDF文件第3页浏览型号NE5550279A-A的Datasheet PDF文件第4页浏览型号NE5550279A-A的Datasheet PDF文件第5页浏览型号NE5550279A-A的Datasheet PDF文件第6页浏览型号NE5550279A-A的Datasheet PDF文件第7页浏览型号NE5550279A-A的Datasheet PDF文件第8页  
A Business Partner of Renesas Electronics Corporation.  
NE5550279A  
RECOMMENDED OPERATING RANGE (TA = 25°C)  
Parameter  
Drain to Source Voltage  
Gate to Source Voltage  
Drain Current  
Symbol  
VDS  
Test Conditions  
MIN.  
TYP.  
7.5  
MAX.  
9.0  
2.85  
Unit  
V
VGS  
1.65  
2.20  
0.4  
V
IDS  
A
Input Power  
Pin  
f = 460 MHz, VDS = 7.5 V  
15  
20  
dBm  
ELECTRICAL CHARACTERISTICS (TA = 25°C, unless otherwise specified)  
Parameter  
DC Characteristics  
Symbol  
Test Conditions  
MIN.  
TYP.  
MAX.  
Unit  
Gate to Source Leakage Current  
Drain to Source Leakage Current  
(Zero Gate Voltage Drain Current)  
Gate Threshold Voltage  
Drain to Source Breakdown Voltage  
Transconductance  
IGSS  
IDSS  
VGS = 6.0 V  
100  
10  
nA  
VDS = 25 V  
μA  
Vth  
BVDSS  
Gm  
VDS = 7.5 V, IDS = 1.0 mA  
IDS = 10 μA  
1.15  
25  
1.65  
38  
2.25  
V
V
VDS = 7.5 V, IDS = 140±20 mA  
Channel to Case  
0.36  
0.44  
20.0  
0.58  
S
<R>  
Thermal Resistance  
Rth  
°C/W  
RF Characteristics  
Output Power  
Pout  
IDS  
f = 460 MHz, VDS = 7.5 V,  
Pin = 15 dBm,  
31.5  
33.0  
0.38  
70  
dBm  
A
Drain Current  
Power Drain Efficiency  
Power Added Efficiency  
Linear Gain  
ηd  
IDset = 40 mA (RF OFF)  
%
ηadd  
68  
%
Note  
GL  
22.5  
dB  
Note: Pin = 0 dBm  
Remark DC performance is 100% testing. RF performance is testing several samples per wafer.  
Wafer rejection criteria for standard devices is 1 reject for several samples.  
R09DS0033EJ0200 Rev.2.00  
Jul 04, 2012  
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