P1 and P2 can also be made larger to reduce power dissipa-
tion. However, larger resistances will push the useful adjust-
ment range to the edges of the potentiometer. P1 should
probably not exceed 20kΩ and P2 100kΩ in order to main-
tain reasonable sensitivity.
CALIBRATION
The ADS7831 can be trimmed in hardware or software. The
offset should be trimmed before the gain since the offset
directly affects the gain.
Hardware Calibration
Software Calibration or No Calibration
To calibrate the offset and gain of the ADS7831, install the
proper resistors and potentiometers as shown in Figure 4a.
The calibration range is ±12mV for the offset and ±30mV
for full scale.
The ADS7831 does not require external resistors for its
basic operation. However, the component is designed to be
used with an external 50Ω resistor on the input, and the
specifications apply to this condition. If this resistor is not
used, the only specification that will be affected is total
unadjusted error.
Potentiometer P1 and resistor R1 form the offset adjust
circuit and P2 and R2 the gain adjust circuit. The exact values
are not critical. R1 and R2 should not be made any larger than
the value shown. They can easily be made smaller to
provide increased adjustment range. Reducing these below
15% of the indicated values could begin to adversely affect
the operation of the converter.
With the 50Ω resistor, the nominal input voltage range is
±2.5V and the total unadjusted error is ±10LSBs guaran-
teed. Without the 50Ω resistor, the nominal input voltage
range will be ±2.46V and the total unadjusted error is not
guaranteed. While it will typically be much less, the total
unadjusted error could be as high as ±20LSBs.
t11
t11
t11
t11
R/C
CS
t1
t3
t5
t4
BUSY
t6
Convert
t7
Acquire
Acquire
MODE
t2
DATA
BUS
Hi-Z State
Data Valid HI Z State
t9
t13
FIGURE 3. Using CS to Control Conversion and Read Timing.
50Ω
VIN
VIN
50Ω
VIN
VIN
+5V
R1
20kΩ
AGND1
REF
P1
5kΩ
R2
604kΩ
AGND1
REF
+5V
–5V
P2
5kΩ
0.1µF
10µF
0.1µF
CAP
+
CAP
+
10µF
AGND2
AGND2
NOTE: Use 1% metal film resistors. Trim offset at 0V first, then trim
gain at 2.5V.
FIGURE 4b. Circuit Diagram Without External Hardware Trim.
FIGURE 4a. Circuit Diagram With External Hardware Trim.
®
9
ADS7831
BB [ BURR-BROWN CORPORATION ]
