SPECIFICATIONS
At TA = –40°C to +85°C, fS = 600kHz, +VDIG = +VANA = +5V, –VANA = –5V, using internal reference and the 50Ω input resistor shown in Figure 4b, unless otherwise specified.
ADS7831P, U
PARAMETER
RESOLUTION
CONDITIONS
MIN
TYP
MAX
UNITS
12
Bits
ANALOG INPUT
Voltage Range
Impedance
±2.5
3.1
5
V
kΩ
pF
Capacitance
THROUGHPUT SPEED
Conversion Time
Complete Cycle
1.3
µs
µs
Acquire & Convert
1.66
Throughput Rate
600
kHz
DC ACCURACY
Integral Linearity Error
Differential Linearity Error
No Missing Codes
±1
±1
LSB(1)
LSB
Guaranteed
Total Unadjusted Error(2, 3)
(Includes Bipolar Zero Error and Full Scale Error)
Power Supply Sensitivity
(+VDIG = +VANA = VD)
±10
±5
LSB
LSB
+4.75V < VD < +5.25V
–5.25V < –VANA < –4.75V
AC ACCURACY
Spurious-Free Dynamic Range
Total Harmonic Distortion
Signal-to-(Noise+Distortion)
Signal-to-Noise
Usable Bandwidth(5)
Full-Power Bandwidth
f
IN = 250kHz
77
87
–85
71
72
1.6
15
dB(4)
dB
dB
dB
MHz
MHz
fIN = 250kHz
–77
f
f
IN = 250kHz
IN = 250kHz
69
69
SAMPLING DYNAMICS
Aperture Delay
Aperture Jitter
Transient Response
Overvoltage Recovery(6)
20
10
200
250
ns
ps
ns
ns
FS Step
REFERENCE
Reference Voltage
2.45
2.5
2.55
V
Reference DC Source Current
(External load should be static)
100
µA
DIGITAL INPUTS
Logic Levels
VIL
VIH
IIL
–0.3
+2.4
+0.8
VD + 0.3
±10
V
V
µA
µA
VIL = 0V
VIH = 5V
IIH
±10
DIGITAL OUTPUTS
Data Format
Data Coding
VOL
Parallel 12-bits
Binary Two's Complement
ISINK = 1.6mA
ISOURCE = 500µA
High-Z State,
+0.4
±5
V
V
µA
VOH
+2.8
Leakage Current
V
OUT = 0V to VDIG
High-Z State
Output Capacitance
15
pF
DIGITAL TIMING
Bus Access Time
Bus Relinquish Time
62
83
ns
ns
POWER SUPPLIES
Specified Performance
+VDIG = +VANA
–VANA
+4.75
–5.25
+5
–5
+5.25
–4.75
V
V
+IDIG
+IANA
–IANA
Power Dissipation
+16
+16
–12
220
mA
mA
mA
mW
fS = 600kHz
275
TEMPERATURE RANGE
Specified Performance
Storage
–40
–65
+85
+150
°C
°C
Thermal Resistance (θJA
Plastic DIP
SOIC
)
75
75
°C/W
°C/W
NOTES: (1) LSB means Least Significant Bit. For the 12-bit, ±2.5V input ADS7831, one LSB is 1.22mV. (2) Measured with 50Ω in series with analog input. Adjustable
to zero with external potentiometers. (3) Total unadjusted error is the worst case of –Full Scale or +Full Scale untrimmed deviation from ideal first and last code
transitions and includes the effect of offset error. (4) All specifications in dB are referred to a full-scale ±2.5V input. (5) Usable Bandwidth defined as Full-Scale input
frequency at which Signal-to-(Noise+Distortion) degrades to 60dB, or 10 bits of accuracy. 6) Recovers to specified performance after 2 x FS input over voltage.
®
ADS7831
2