SPECIFICATIONS
ELECTRICAL
At TA = –40°C to +85°C, fS = 800kHz, +VDIG = +VANA = +5V, –VANA = –5V, using internal reference and the 50Ω input resistor shown in Figure 4b, unless otherwise specified.
ADS7810U
TYP
ADS7810UB
TYP
PARAMETER
RESOLUTION
CONDITIONS
MIN
MAX
MIN
MAX
UNITS
12
✻
Bits
ANALOG INPUT
Voltage Range
Impedance
±10
3.1
5
✻
✻
✻
V
kΩ
pF
Capacitance
THROUGHPUT SPEED
Conversion Cycle
Complete Cycle
t3 + t4
Acquire & Convert
1020
✻
ns
ns
1250
✻
Throughput Rate
800
✻
kHz
DC ACCURACY
Integral Linearity Error
Differential Linearity Error
No Missing Codes
±1
±1
±0.75
✻
LSB(1)
LSB
Guaranteed
0.1
✻
✻
Transition Noise(2)
LSB
%
ppm/°C
%
ppm/°C
LSB
ppm/°C
Full Scale Error(3, 4)
Full Scale Error Drift
Full Scale Error(3, 4)
Full Scale Error Drift
Bipolar Zero Error(3)
Bipolar Zero Error Drift
Power Supply Sensitivity
(+VDIG = +VANA = VD)
±0.5
±0.5
±8
±0.25
✻
±12
±12
±2
✻
✻
✻
Ext. 2.5000V Ref
Ext. 2.5000V Ref
±4
+4.75V < VD < +5.25V
–5.25V < –VANA < –4.75V
±5
±0.5
✻
✻
LSB
LSB
AC ACCURACY
Spurious-Free Dynamic Range
Total Harmonic Distortion
Signal-to-(Noise+Distortion)
Signal-to-Noise
f
IN = 250kHz
74
82
–80
71
71
1.5
77
84
–82
✻
✻
✻
dB(5)
dB
dB
dB
MHz
fIN = 250kHz
f
f
–74
–77
IN = 250kHz
IN = 250kHz
67
68
69
70
Usable Bandwidth(6)
SAMPLING DYNAMICS
Aperture Delay
Aperture Jitter
Transient Response
Overvoltage Recovery(7)
20
10
200
250
✻
✻
✻
✻
ns
ps
ns
ns
FS Step
REFERENCE
Internal Reference Voltage
Internal Reference DC Source Current
(External load should be static)
Internal Reference Drift
External Reference Voltage Range
For Specified Linearity
2.48
2.3
2.5
100
2.52
✻
✻
✻
✻
✻
V
µA
8
2.5
ppm/°C
V
2.7
✻
✻
✻
External Reference Current Drain
Ext. 2.5000V Ref
100
µA
DIGITAL INPUTS
Logic Levels
VIL
VIH
IIL
–0.3
+2.4
+0.8
VD + 0.3
±10
✻
✻
✻
✻
✻
✻
V
V
µA
µA
VIL = 0V
VIH = 5V
IIH
±10
DIGITAL OUTPUTS
Data Format
Data Coding
VOL
Parallel 12 Bits
Binary Two’s Complement
+0.4
ISINK = 1.6mA
ISOURCE = 500µA
High-Z State,
✻
✻
V
V
µA
VOH
+2.8
✻
Leakage Current
±5
V
OUT = 0V to VDIG
High-Z State
Output Capacitance
15
15
pF
DIGITAL TIMING
Bus Access Time
Bus Relinquish Time
62
83
✻
✻
ns
ns
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
ADS7810
2
BB [ BURR-BROWN CORPORATION ]
