TIMING DIAGRAM
N + 9
N + 10
N + 8
N + 2
N + 1
N + 4
N + 3
Analog In
N
N + 7
N + 5
N + 6
tL
tH
tD
tCONV
Clock
10 Clock Cycles
N – 6 N – 5
t2
N
Data Out
N – 10
N – 9
N – 8
N – 7
N – 4
N – 3
N – 2
N – 1
Data Invalid
t1
Data Valid Output
tDV
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNITS
tCONV
tL
tH
tD
t1
Convert Clock Period
Clock Pulse LOW
Clock Pulse HIGH
Aperture Delay
25
11.5
11.5
1µs
ns
ns
ns
ns
ns
ns
tCONV/2
tCONV/2
3
7.2
12.7
Data Hold Time, CL = 0pF
New Data Delay Time, CL = 15pF max
3.9
t2
tDV
Data Valid Output, CL = 15pF
4.4
ns
REFERENCE AND FULL-SCALE RANGE SELECT TABLE
DESIRED FULL-SCALE RANGE
SEL1
SEL2
INTERNAL VREF
4Vp-p
3Vp-p
2Vp-p
GND
GND
VREF
GND
+VSA
GND
2V
1.5V
1V
NOTE: For external reference operation, tie VREF to +VSA. The full-scale range will be 2x the reference value. For example, selecting a 2V external reference
will set the full-scale values of 1.5V to 3.5V for both IN and IN inputs.
ADS5421
SBAS237D
5
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