ELECTRICAL CHARACTERISTICS (Cont.)
TA = specified temperature range, typical at +25°C, +VSA = +VSD = +5V, differential input range = 1.5V to 3.5V each input (4Vp-p), sampling rate = 40MHz, internal
reference, VDRV = +3V, and –1dBFS, unless otherwise noted.
ADS5421Y
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL INPUTS
Clock Input
Rising Edge of Convert Clock
+0.5
+VSD
Vp-p
Logic Family (other than clock inputs)
High Level Input Current(5) (VIN = 5V)
Low Level Input Current (VIN = 0V)
High Level Input Voltage
Low Level Input Voltage
Input Capacitance
+3V/+5V Compatible CMOS
100
10
µA
µA
V
V
pF
+2.0
+1.0
5
DIGITAL OUTPUTS(6)
Logic Family
Logic Coding
+3V/+5V Compatible CMOS
Straight Offset Binary
Low Output Voltage (IOL = 50µA to 0.5mA)
High Output Voltage (IOH = 50µA to 0.5mA)
Low Output Voltage (IOL = 50µA to 1.6mA)
High Output Voltage (IOH = 50µA to 1.6mA)
3-State Enable Time
VDRV = 3V
VDRV = 5V
+0.2
+0.2
V
V
V
+2.5
+2.5
V
OE = LOW
OE = HIGH
20
2
5
40
10
ns
ns
pF
3-State Disable Time
Output Capacitance
ACCURACY
Zero Error (Referred to –FS)
Zero Error Drift (Referred to –FS)
Gain Error(7)
at +25°C
at +25°C
±0.5
15
±0.2
35
±1.0
±1.0
%FS
ppm/°C
%FS
ppm/°C
dB
Gain Error Drift(7)
Power-Supply Rejection of Gain
∆VS = ±5%
68
Internal REF Tolerance (VREFT, VREFB
External REF Voltage Range
Reference Input Resistance
)
Deviation from Ideal
±10
2
1.0
±50
2.025
mV
V
kΩ
0.9
POWER-SUPPLY REQUIREMENTS
Supply Voltage: +VSA, +VSD
Supply Current: +IS
Output Driver Supply Current (VDRV)
Power Dissipation: VDRV = 5V
VDRV = 3V
Operating, fIN = 10MHz
Operating, fIN = 10MHz
+4.75
+5.0
170
12
900
850
40
+5.25
925
V
mA
mA
mW
mW
mW
Power Down
Operating
Thermal Resistance, θJA
LQFP-64
48
°C/W
NOTES: (1) Spurious-Free Dynamic Range refers to the magnitude of the largest harmonic. (2) dBFS means dB relative to Full-Scale. (3) 2-tone intermodulation
distortion is referred to the largest fundamental tone. This number will be 6dB higher if it is referred to the magnitude of the 2-tone fundamental envelope.
(4) Effective Number of Bits (ENOB) is defined by (SINAD – 1.76)/6.02. (5) A 50kΩ pull-down resistor is inserted internally. (6) Recommended maximum
capacitance loading, 15pF. (7) Includes internal reference.
ADS5421
SBAS237D
3
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