ꢎ ꢒꢖ ꢗꢀ ꢘꢗ
www.ti.com
SBAS306A − NOVEMBER 2004 − REVISED DECEMBER 2004
TIMING CHARACTERISTICS: FRAME-SYNC FORMAT
tCPW
τ C
CLK
•
•
•
tCPW
tCF
tFRAME
tFPW
tFPW
FSYNC
SCLK
DOUT
DIN
tSPW
tS
tSPW
tSF
tFS
tSPW
tDDO
Bit 23 (MSB)
tDOPD
tDOHD
Bit 21
Bit 22
tDIHD
tDIST
TIMING REQUIREMENTS: FRAME-SYNC FORMAT
for T = −40°C to +105°C and DVDD = 1.65V to 3.6V.
A
SYMBOL
PARAMETER
MIN
37
TYP
MAX
UNIT
t
t
t
CLK period (1/f
)
1000
ns
ns
CLK
CPW
CS
CLK
CLK positive or negative pulse width
Rising edge of CLK to falling edge of SCLK
High-Speed mode
15
−2
8
ns
256
CLK periods
CLK periods
CLK periods
SCLK periods
ns
(1)
High-Resolution mode
Low-Power mode
256 or 512
256 or 512
t
Frame period (1/f )
DATA
FRAME
(1)
t
t
t
FSYNC positive or negative pulse width
Rising edge of FSYNC to rising edge of SCLK
Rising edge of SCLK to rising edge of FSYNC
High-Speed mode
1
5
5
FPW
FS
ns
SF
τ
/64
FRAME
τ
τ
τ
periods
periods
periods
FRAME
SCLK period (SCLK must
High-Resolution mode
be continuously running)
τ
/128
FRAME
τ
S
FRAME
Low-Power mode
τ
/64
FRAME
FRAME
ns
t
t
t
t
t
t
SCLK positive or negative pulse width
0.4τ
0.6τ
SPW
SCLK
5
SCLK
(2)
(2)
SCLK falling edge to old DOUT invalid (hold time)
SCLK falling edge to new DOUT valid (propagation delay)
Valid DOUT to falling edge of FSYNC
ns
ns
ns
ns
ns
DOHD
DOPD
12
(2)
0
6
6
DDO
DIST
DIHD
New DIN valid to falling edge of SCLK (setup time)
Old DIN valid to falling edge of SCLK (hold time)
(1)
(2)
The ADS1271 automatically detects either frame period.
Load on DOUT = 20pF.
7
BB [ BURR-BROWN CORPORATION ]
