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SBAS306A − NOVEMBER 2004 − REVISED DECEMBER 2004
TIMING CHARACTERISTICS: SPI FORMAT
tCLK
tCPW
CLK
•
•
•
tCPW
tCD
tCONV
DRDY
SCLK
tSD
tDS
tS
tSPW
tSPW
tDOPD
tDDO
tDOHD
Bit 23 (MSB)
Bit 22
tDIST
Bit 21
DOUT
DIN
tDIHD
TIMING REQUIREMENTS: SPI FORMAT
For T = −40°C to +105°C and DVDD = 1.65V to 3.6V.
A
SYMBOL
PARAMETER
MIN
37
TYP
MAX
UNIT
t
CLK period (1/f
)
1000
ns
CLK
CLK
t
CLK positive or negative pulse width
High-Speed mode
15
ns
CPW
256
512
512
8
CLK periods
High-Resolution mode
Low-Power mode
CLK periods
t
Conversion period (1/f )
DATA
CONV
CLK periods
(1)
t
t
t
t
t
t
t
t
t
t
Falling edge of CLK to falling edge of DRDY
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CD
(1)
Falling edge of DRDY to rising edge of first SCLK to retrieve data
Valid DOUT to falling edge of DRDY
5
0
DS
(1)
DDO
(1)
Falling edge of SCLK to rising edge of DRDY
SCLK period
8
SD
t
S
CLK
12
SCLK positive or negative pulse width
SPW
DOHD
DOPD
DIST
DIHD
(1)
(1)
SCLK falling edge to old DOUT invalid (hold time)
SCLK falling edge to new DOUT valid (propagation delay)
New DIN valid to falling edge of SCLK (setup time)
Old DIN valid to falling edge of SCLK (hold time)
5
12
6
6
(1)
Load on DRDY and DOUT = 20pF.
6