PIN CONFIGURATION
Top View
SOL-16
16
15
14
13
12
11
10
9
+VIN
–VIN
DGND
1
2
3
4
5
6
7
8
G1 (MSB)
G0 (LSB)
AGND
+VS
VREF
CS
ADS1250
DRDY
CLK
DSYNC
+VD
SCLK
DOUT
DGND
PIN DESCRIPTIONS
PIN
NAME
PIN DESCRIPTION
1
2
3
4
5
6
+VIN
–VIN
Analog Input: Positive Input of the Differential Analog Input.
Analog Input: Negative Input of the Differential Analog Input.
Analog Input: Analog Ground.
AGND
+VS
Analog Input: Analog Power Supply Voltage, +5V.
Analog Input: Reference Voltage Input.
VREF
DSYNC
Digital Input: Data Synchronization. A falling edge on this input will reset the modulator count and place the modulator in a hold
state. The modulator is released from the hold state on the rising edge of DSYNC. This can be used to synchronize multiple
ADS1250s.
7
8
9
+VD
Digital Input: Digital Power Supply Voltage, +5V.
Digital Input: Digital Ground.
DGND
DOUT
Digital Output: Serial Data Output. The serial data is clocked out of the serial data output shift register through this pin. The pin
is driven when CS is LOW, and high impedance when CS is HIGH.
10
SCLK
Digital Input: Serial Clock. The serial clock is in the form of a CMOS-compatible clock. The serial clock can operate up to the
device’s system clock frequency. The serial clock can be either a free-running clock or noncontinuous clock, with either type of
clock; the serial data output is gated by CS.
11
12
CLK
Digital Input: Device System Clock. The system clock is in the form of a CMOS-compatible clock.
DRDY
Digital Output: Data Ready. A falling edge on this output indicates that a new output word is available from the ADS1250 data output
register.
13
CS
Digital Input: Chip Select. Active LOW logic input used to enable serial data output from the ADS1250. CS controls the state of
the DOUT pin. If CS is HIGH, DOUT is high impedance; if CS is LOW, DOUT drives the bus. CS can be used in three ways:
(1) If the ADS1250 shares the bus with other devices, CS is used as serial data output enable for communications.
(2) If the ADS1250 shares the bus with other devices and SCLK is a free-running clock, CS is used to gate serial data
out of the device.
(3) If the ADS1250 is the only device on the bus, CS can be tied LOW to always enable serial data output for a
two-wire interface.
Refer to the Serial Communications section of this data sheet for more detail.
Digital Input: Gain Selection Control (LSB).
14
15
16
G0
G1
Digital Input: Gain Selection Control (MSB).
DGND
Digital Input: Digital Ground.
®
ADS1250
4
BB [ BURR-BROWN CORPORATION ]
