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10M02SCU169C8G 参数 Datasheet PDF下载

10M02SCU169C8G图片预览
型号: 10M02SCU169C8G
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, PBGA169, 11 X 11 MM, 0.80 MM PITCH, ROHS COMPLIANT, UBGA-169]
分类和应用: 时钟可编程逻辑
文件页数/大小: 71 页 / 822 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Contents  
Contents  
Intel® MAX® 10 FPGA Device Datasheet.....................................................................................................................................3  
Electrical Characteristics...................................................................................................................................................... 3  
Operating Conditions..................................................................................................................................................4  
Switching Characteristics....................................................................................................................................................25  
Core Performance Specifications.................................................................................................................................26  
Periphery Performance Specifications..........................................................................................................................35  
Configuration Specifications................................................................................................................................................57  
JTAG Timing Parameters........................................................................................................................................... 58  
Remote System Upgrade Circuitry Timing Specifications................................................................................................59  
User Watchdog Internal Circuitry Timing Specifications..................................................................................................59  
Uncompressed Raw Binary File (.rbf) Sizes.................................................................................................................. 59  
Internal Configuration Time.......................................................................................................................................60  
Internal Configuration Timing Parameter..................................................................................................................... 61  
I/O Timing....................................................................................................................................................................... 61  
Programmable IOE Delay................................................................................................................................................... 62  
Programmable IOE Delay On Row Pins........................................................................................................................ 62  
Programmable IOE Delay for Column Pins....................................................................................................................63  
Glossary.......................................................................................................................................................................... 63  
Document Revision History for Intel MAX 10 FPGA Device Datasheet........................................................................................66  
Intel® MAX® 10 FPGA Device Datasheet  
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