Turbo IC, Inc.
24C01/24C02
PRODUCT INTRODUCTION
CMOS I²C 2-WIRE BUS
1K/2K ELECTRICALLY ERASABLE PROGRAMMABLE ROM
128/256 X 8 BIT EEPROM
FEATURES :
• Power Supply Voltage
Single Vcc for Read and Programming
(Vcc = 2.7 V to 5.5 V)
• Low Power (Isb = 2µa @ 5.5 V)
• I²C Bus, 2-Wire Serial Interface
• Support Byte Write and Page Write (8 Bytes)
• Automatic Page write Operation (maximum 10 ms)
Internal Control Timer
Internal Data Latches for 8 Bytes
• High Reliability CMOS Technology with EEPROM Cell
Endurance : 1,000,000 Cycles
Data Retention : 100 Y
ears
DESCRIPTION:
The Turbo IC 24C01/24C02 is a serial 1K/2K EEPROM
fabricated with Turbo’s proprietary, high reliability, high per-
formance CMOS technology. It’s 1K/2K of memory is orga-
nized as 128/256 x 8 bits. The memory is configured as 16/
32 pages with each page containing 8 bytes. This device
offers significant advantages in low power applications.
The Turbo IC 24C01/24C02 uses the I²C addressing proto-
col and 2-wire serial interface which includes a bidirec-
tional serial data bus synchronized by a clock. It offers a
flexible byte write and a faster 8-byte page write.
The Turbo IC 24C01/24C02 is assembled in either a 8-pin
PDIP or 8-pin SOIC package. Pin #1 is the A0 device ad-
dress input for the device. Pin #2 is the A1 device address
input for the device. Pin #3 is the A2 device address input
for the device, such that a total of eight 24C01/24C02 de-
vices can be connected on a single bus. Pin #4 is the ground
(Vss). Pin #5 is the serial data (SDA) pin used for bidirec-
tional transfer of data. Pin #6 is the serial clock (SCL) input
pin. Pin #7 is the write protect (WP) pin used to protect hard-
ware data. Pin #8 is the power supply (Vcc) pin.
All data is serially transmitted in bytes (8 bits) on the SDA
bus. To access the Turbo IC 24C01/24C02 (slave) for a read
or write operation, the controller (master) issues a start con-
dition by pulling SDA from high to low while SCL is high. The
master then issues the device address byte which consists
of 1010 (A2) (A1) (A0) (R/W). The most significant bits (1010)
are a device type code signifying an EEPROM device. A0,
A1, and A2 are the device address select bits which has to
match the A0, A1, and A2 pin inputs on the device. The B[7]
bit (or B[6] bit in the 24C01) is the most significant bit of the
memory address. The read/write bit determines whether to
do a read or write operation. After each byte is transmitted,
the receiver has to provide an acknowledge by pulling the
SDA bus low on the ninth clock cycle. The acknowledge is a
handshake signal to the transmitter indicating a successful
data transmission.
SERIAL CLOCK (SCL)
The SCL input synchronizes the data on the SDA
bus. It is used in conjunction with SDA to define
the start and stop conditions. It is also used in
conjunction with SDA to transfer data to and from
the Turbo IC 24C01/24C02.
PIN DESCRIPTION
A0
A1
A2
GND
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
A0
A1
A2
GND
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
8 pin SOIC
8 pin PDIP
PIN DESCRIPTION
DEVICE ADDRESS (A0 & A1 & A2)
A0, A1, and A2 are device address inputs that
enables a total of eight 24C01/24C02 devices to
connect on a single bus. If the address input pin
is left unconnected, it is interpreted as zero.
WRITE PROTECT (WP)
When the write protect input is connected to Vcc,
the entire memory array is protected against write
operations. For normal write operations, the write
protect pin should be grounded. When the pin is
left unconnected, WP is interpreted as zero.
SERIAL DATA (SDA)
SDA is a bidirectional pin used to transfer data
in and out of the Turbo IC 24C01/24C02. The pin
is an open-drain output. A pullup resistor must
be connected from SDA to Vcc.
1
ETC [ ETC ]
