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RD-19230FX-202 参数 Datasheet PDF下载

RD-19230FX-202图片预览
型号: RD-19230FX-202
PDF下载: 下载PDF文件 查看货源
内容描述: 分解器数字转换器\n [Resolver-to-Digital Converter ]
分类和应用: 转换器
文件页数/大小: 20 页 / 196 K
品牌: ETC [ ETC ]
 浏览型号RD-19230FX-202的Datasheet PDF文件第11页浏览型号RD-19230FX-202的Datasheet PDF文件第12页浏览型号RD-19230FX-202的Datasheet PDF文件第13页浏览型号RD-19230FX-202的Datasheet PDF文件第14页浏览型号RD-19230FX-202的Datasheet PDF文件第16页浏览型号RD-19230FX-202的Datasheet PDF文件第17页浏览型号RD-19230FX-202的Datasheet PDF文件第18页浏览型号RD-19230FX-202的Datasheet PDF文件第19页  
LVDT MODE  
As shown in TABLE 1 the RD-19.30 unit can be made to oper-  
ate as an LVDT-to-digital converterꢀ In this mode the RD-19.30  
functions as a ratiometric tracking linear converterꢀ When linear  
AC inputs are applied from a LVDT the converter operates over  
one quarter of its rangeThis results in two less bits of resolution  
for LVDT mode than are provided in resolver modeꢀ  
Data output of the RD-19.30 is Binary Coded in LVDT modeThe  
most negative stroke of the LVDT is represented by ALL ZEROS  
and the most positive stroke of the LVDT is represented by ALL  
ONESThe most significant . bits (. MSBs) may be used as over-  
range indicatorsꢀ Positive overrange is indicated by code 01and  
negative overrange is indicated by code 11(see TABLE 7)ꢀ  
LDVT output signals need to be scaled to be compatible with the  
converter inputꢀ FIGURE .5 is a schematic of an input scaling  
circuit applicable to 3-wire LVDTsꢀ The value of the scaling con-  
stant ais selected to provide an input of . Vrms at full stroke of  
the LVDTThe value of scaling constant bis selected to provide  
an input of 1 Vrms at null of the LVDTSuggested components  
for implementing the input scaling circuit are a quad op-amp,  
such as a OP11 type, and precision thin-film resistors of 0ꢀ1%  
toleranceꢀ FIGURE .4 illustrates a .-wire LVDT configurationꢀ  
TABLE 7. 12-BIT LVDT OUTPUT CODE FOR FIGURE 25  
LVDT OUTPUT  
MSB  
LSB  
+ over full travel  
+ full travel -1 LSB  
+0ꢀ5 travel  
+1 LSB  
null  
- 1 LSB  
-0ꢀ5 travel  
- full travel  
- over full travel  
01  
00  
00  
00  
00  
00  
00  
00  
11  
xxxx  
1111  
1100  
1000  
1000  
0111  
0100  
0000  
xxxx  
xxxx  
1111  
0000  
0000  
0000  
1111  
0000  
0000  
xxxx  
xxxx  
1111  
0000  
0001  
0000  
1111  
0000  
0000  
xxxx  
C1  
SIN  
aR  
-S  
. WIRE LVDT  
R
-
R
+S  
REF IN  
R
+
FS = . V  
aR  
C.  
COS  
bR  
R
R
.R  
-C  
R
R
-
.R  
+C  
+
. V  
R
bR  
+RH  
-RL  
C
= C , set for phase lag = phase lead through the LVDTꢀ  
.
1
FIGURE 24. 2-WIRE LVDT DIRECT INPUT  
15  
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