PIN CONFIGURATION
Top View
SSOP
PIN DESCRIPTIONS
PIN
1
2
3
4
5
6
7
8
9
10
11
12
DESIGNATOR
GND
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10
OE
DESCRIPTION
Ground
Data Bit 1 (D9) (MSB)
Data Bit 2 (D8)
Data Bit 3 (D7)
Data Bit 4 (D6)
Data Bit 5 (D5)
Data Bit 6 (D4)
Data Bit 7 (D3)
Data Bit 8 (D2)
Data Bit 9 (D1)
Data Bit 10 (D0) (LSB)
Output Enable. HI: High Impedance State.
LO: Normal Operation (Internal Pull-down
Resistor)
Power Down: HI = Power Down; LO = Normal
Convert Clock Input
+5V Supply
Ground
Input Range Select: HI = 2V; LO = 1V
Reference Select: HI = External; LO = Internal
Bottom Reference
Bottom Ladder Bypass
Top Ladder Bypass
Top Reference
Common-Mode Voltage Output
Complementary Input (–)
Analog Input (+)
Ground
+5V Supply
Output Logic Driver Supply Voltage
GND
Bit 1 (MSB)
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
1
2
3
4
5
6
7
8
9
ADS823
ADS826
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VDRV
+V
S
GND
IN
IN
CM
REFT
ByT
ByB
REFB
INT/EXT
RSEL
GND
+V
S
Bit 9 10
Bit 10 (LSB) 11
OE 12
PD 13
CLK 14
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
PD
CLK
+V
S
GND
RSEL
INT/EXT
REFB
ByB
ByT
REFT
CM
IN
IN
GND
+V
S
VDRV
TIMING DIAGRAM
N+1
Analog In
N
t
D
Clock
t
CONV
N+2
N+3
N+4
N+5
t
L
t
H
N+6
N+7
5 Clock Cycles
t
2
Data Out
N–5
N–4
N–3
N–2
N–1
N
t
1
N+1
N+2
Data Invalid
SYMBOL
t
CONV
t
L
t
H
t
D
t
1
t
2
DESCRIPTION
Convert Clock Period
Clock Pulse Low
Clock Pulse High
Aperture Delay
Data Hold Time, C
L
= 0pF
New Data Delay Time, C
L
= 15pF max
MIN
16.6
7.9
7.9
3.9
TYP
MAX
100µs
UNITS
ns
ns
ns
ns
ns
ns
8.3
8.3
3
12
4
ADS823, ADS826
SBAS070A
ETC [ ETC ]
