ELECTRICAL CHARACTERISTICS
(Cont.)
At T
A
= full specified temperature range, single-ended input range = 1.5V to 3.5V, sampling rate = 60MHz, external reference, unless otherwise noted.
ADS823E
MIN
DIGITAL INPUTS
Logic Family
Convert Command
High Level Input Current
(6)
(V
IN
= 5V)
Low Level Input Current (V
IN
= 0V)
High Level Input Voltage
Low Level Input Voltage
Input Capacitance
DIGITAL OUTPUTS
Logic Family
Logic Coding
Low Output Voltage (I
OL
= 50µA to 1.6mA)
High Output Voltage, (I
OH
= 50µA to 0.5mA)
Low Output Voltage, (I
OL
= 50µA to 1.6mA)
High Output Voltage, (I
OH
= 50µA to 0.5mA)
3-State Enable Time
3-State Disable Time
Output Capacitance
ACCURACY (Internal Reference, 2Vp-p,
Unless Otherwise Noted)
Zero Error (referred to –FS)
Zero Error Drift (referred to –FS)
Midscale Offset Error
Gain Error
(7)
Gain Error Drift
(7)
Gain Error
(8)
Gain Error Drift
(8)
Power Supply Rejection of Gain
REFT Tolerance
REFB Tolerance
(9)
External REFT Voltage Range
External REFB Voltage Range
Reference Input Resistance
POWER SUPPLY REQUIREMENTS
Supply Voltage: +V
S
Supply Current: +I
S
Power Dissipation: VDRV = 5V
VDRV = 3V
VDRV = 5V
VDRV = 3V
Power Down
Thermal Resistance,
θ
JA
SSOP-28
✻
Indicates the same specifications as the ADS823E.
NOTES: (1) ADS826 accepts a +3V clock input. (2) Spurious Free Dynamic Range refers to the magnitude of the largest harmonic. (3) dBFS means dB relative to Full Scale. (4) Two-tone intermodulation
distortion is referred to the largest fundamental tone. This number will be 6dB higher if it is referred to the magnitude of the two-tone fundamental envelope. (5) Effective number of bits (ENOB) is defined
by (SINAD – 1.76)/6.02. (6) A 50kΩ pull-down resistor is inserted internally on OE pin. (7) Includes internal reference. (8) Excludes internal reference. (9) Guaranteed by design.
TYP
MAX
MIN
ADS826E
(1)
TYP
MAX
UNITS
Start Conversion
CMOS-Compatible
Rising Edge of Convert Clock
+100
+10
+3.5
+1.0
5
CMOS
Straight Offset Binary
+0.1
+4.9
+0.1
+2.8
2
40
2
10
5
TTL, +3V/+5V CMOS-Compatible
Rising Edge of Convert Clock
✻
✻
+2.0
+0.8
✻
CMOS
Straight Offset Binary
✻
✻
✻
✻
✻
✻
✻
✻
✻
µA
µA
V
V
pF
VDRV = 5V
VDRV = 3V
OE = H to L
OE = L to H
f
S
= 2.5Mhz
At 25°C
At 25°C
At 25°C
At 25°C
∆
V
S
=
±5%
Deviation From Ideal 3.5V
Deviation From Ideal 1.5V
V
V
V
V
ns
ns
pF
±1.0
16
±1.5
66
±1.0
23
70
±10
±10
3.5
1.5
1.6
+5.0
55
275
265
295
285
20
89
±3.0
±3.5
±2.5
REFB + 0.8
1.25
REFT to REFB
Operating
Operating
External Reference
External Reference
Internal Reference
Internal Reference
Operating
+4.75
±25
±25
V
S
– 1.25
REFT – 0.8
✻
✻
✻
✻
±0.29
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
% FS
ppm/°C
% FS
% FS
ppm/°C
% FS
ppm/°C
dB
mV
mV
V
V
kΩ
V
mA
mW
mW
mW
mW
mW
°C/W
+5.25
335
350
✻
✻
✻
✻
ADS823, ADS826
SBAS070A
3
ETC [ ETC ]
