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ST72254G1B1 参数 Datasheet PDF下载

ST72254G1B1图片预览
型号: ST72254G1B1
PDF下载: 下载PDF文件 查看货源
内容描述: 与单电压闪存的8位MCU 。 ADC。 16位定时器。 SPI 。\n [8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY. ADC. 16-BIT TIMERS. SPI. ]
分类和应用: 闪存
文件页数/大小: 140 页 / 1350 K
品牌: ETC [ ETC ]
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ST72104G, ST72215G, ST72216G, ST72254G  
INSTRUCTION GROUPS (Cont’d)  
Mnemo  
JRULE  
LD  
Description  
Jump if (C + Z = 1)  
Load  
Function/Example  
Unsigned <=  
dst <= src  
Dst  
Src  
H
I
N
N
N
N
N
Z
Z
Z
Z
Z
C
reg, M  
A, X, Y  
reg, M  
M, reg  
X, Y, A  
MUL  
NEG  
NOP  
OR  
Multiply  
X,A = X * A  
0
0
Negate (2’s compl)  
No Operation  
OR operation  
Pop from the Stack  
neg $10  
C
A = A + M  
pop reg  
pop CC  
push Y  
C = 0  
A
M
POP  
reg  
CC  
M
M
M
H
I
C
0
PUSH  
RCF  
RET  
RIM  
Push onto the Stack  
Reset carry flag  
Subroutine Return  
Enable Interrupts  
Rotate left true C  
Rotate right true C  
Reset Stack Pointer  
Subtract with Carry  
Set carry flag  
reg, CC  
I = 0  
0
RLC  
RRC  
RSP  
SBC  
SCF  
SIM  
C <= Dst <= C  
C => Dst => C  
S = Max allowed  
A = A - M - C  
C = 1  
reg, M  
reg, M  
N
N
Z
Z
C
C
A
M
N
Z
C
1
Disable Interrupts  
Shift left Arithmetic  
Shift left Logic  
I = 1  
1
SLA  
C <= Dst <= 0  
C <= Dst <= 0  
0 => Dst => C  
Dst7 => Dst => C  
A = A - M  
reg, M  
reg, M  
reg, M  
reg, M  
A
N
N
0
Z
Z
Z
Z
Z
Z
Z
C
C
C
C
C
SLL  
SRL  
SRA  
SUB  
SWAP  
TNZ  
TRAP  
WFI  
Shift right Logic  
Shift right Arithmetic  
Subtraction  
N
N
N
N
M
SWAP nibbles  
Dst[7..4] <=> Dst[3..0] reg, M  
tnz lbl1  
Test for Neg & Zero  
S/W trap  
S/W interrupt  
1
0
Wait for Interrupt  
Exclusive OR  
XOR  
A = A XOR M  
A
M
N
Z
95/140  
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