PIC16F87X
TABLE 15-7: SPI MODE REQUIREMENTS
Sym
Characteristic
Min
Typ†
Max Units Conditions
Param
No.
70*
TssL2scH,
TssL2scL
SS↓ to SCK↓ or SCK↑ input
TCY
—
—
ns
71*
72*
73*
TscH
TscL
SCK input high time (slave mode)
SCK input low time (slave mode)
TCY + 20
TCY + 20
100
—
—
—
—
—
—
ns
ns
ns
TdiV2scH,
TdiV2scL
Setup time of SDI data input to SCK edge
74*
75*
TscH2diL,
TscL2diL
Hold time of SDI data input to SCK edge
100
—
—
ns
TdoR
SDO data output rise time
Standard(F)
Extended(LF)
—
—
10
25
25
50
ns
ns
76*
77*
78*
TdoF
SDO data output fall time
—
10
—
25
50
ns
ns
TssH2doZ
TscR
SS↑ to SDO output hi-impedance
10
SCK output rise time (master mode) Standard(F)
Extended(LF)
—
—
10
25
25
50
ns
ns
79*
80*
TscF
SCK output fall time (master mode)
—
10
25
ns
ns
TscH2doV,
TscL2doV
SDO data output valid after SCK
edge
Standard(F)
Extended(LF)
—
—
—
—
50
145
81*
TdoV2scH,
TdoV2scL
SDO data output setup to SCK edge
TCY
—
—
ns
82*
83*
TssL2doV
SDO data output valid after SS↓ edge
SS ↑ after SCK edge
—
—
—
50
—
ns
ns
TscH2ssH,
TscL2ssH
1.5TCY + 40
*
These parameters are characterized but not tested.
†
Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
FIGURE 15-16: I2C BUS START/STOP BITS TIMING
SCL
93
91
90
92
SDA
STOP
Condition
START
Condition
Note: Refer to Figure 15-4 for load conditions.
TABLE 15-8: I2C BUS START/STOP BITS REQUIREMENTS
Parameter
No.
Sym
Characteristic
Min Typ Max Units
Conditions
90
91
92
93
TSU:STA START condition
Setup time
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
4700
600
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Only relevant for repeated START
condition
ns
ns
ns
ns
THD:STA START condition
Hold time
4000
600
After this period the first clock
pulse is generated
TSU:STO STOP condition
Setup time
4700
600
THD:STO STOP condition
Hold time
4000
600
1999 Microchip Technology Inc.
DS30292B-page 167
ETC [ ETC ]
