AP902M
FREQUENCY AND CLOCK DISPLAY CONTROLLER
6. BLOCK DIAGRAM
POR
LCD
DRIVER
VLCD
IF
PRESCALER
DIV. BY 10
AMP
AMP
FMIN
FREQ
COUNTER
OFFSET
AMIN
CLKFREQ_SEL
AMFM_SEL
AL_SIG
TIMING CTL
RANGE
M
U
X
CLOCK
AL_OUT
Figure 2. Internal Block diagram of AP902M
7. DEVICE PIN DESCRIPTION
COB
PIN NO
PIN NAME
I/O
OL
FUNCTION
1
2
3
4
5
6
7
8
COM1
COM2
COM3
S0
S1
S2
S3
S4
S5
S6
LCD Common Drive Signal for Driving LCD Display
LCD Common Drive Signal for Driving LCD Display
LCD Common Drive Signal for Driving LCD Display
LCD Segment Drive Signal for Driving LCD Display
LCD Segment Drive Signal for Driving LCD Display
LCD Segment Drive Signal for Driving LCD Display
LCD Segment Drive Signal for Driving LCD Display
LCD Segment Drive Signal for Driving LCD Display
LCD Segment Drive Signal for Driving LCD Display
LCD Segment Drive Signal for Driving LCD Display
LCD Segment Drive Signal for Driving LCD Display
LCD Segment Drive Signal for Driving LCD Display
LCD Segment Drive Signal for Driving LCD Display
LCD Segment Drive Signal for Driving LCD Display
LCD Segment Drive Signal for Driving LCD Display
LCD Segment Drive Signal for Driving LCD Display
32.768kHz Crystal Oscillator Input Pin.
OL
OL
OL
OL
OL
OL
OL
OL
OL
OL
OL
OL
OL
OL
OL
I
9
10
11
12
13
14
15
16
17
18
19
S7
S8
S9
S10
S11
S12
OSCIN
OSCOUT
VLCD
O
O
32.768kHz Crystal Oscillator Output Pin.
LCD Supply Voltage. Connects a 0.1μF Capacitor Between this Pin and
GND.
20
21
22
POR
AL_ON/OFF
AL_DISP
ISU
ISU
ISU
Active Low Power-on-Reset with Pull-Up Resistor of Approx. 750kΩ.
Alarm Function On or Off in Toggle Mode. Internal Pull Up Input
When Pressed, will Display the Alarm Time. Internal Pull Up Input
Revision 1.5
Page 2 of 13
March 30, 2006
ETC [ ETC ]
