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中断
RC/RD+系列8051 片机 中断 特殊功能寄存器Interrupt SFRs
Mnemonic Add Name
7
EA
-
6
-
-
5
4 3
2
1
0
Reset Value
IE
A8h Interrupt Enable
ET2 ES ET1 EX1 ET0 EX0 0000,0000
PT2 PS PT1 PX1 PT0 PX0 xx00,0000
IP
B8h Interrupt Priority Low
B7h Interrupt Priority High
IPH
XICON
PX3H PX2H PT2H PSH PT1H PX1H PT0H PX0H 0000,0000
C0h Auxiliary Interrupt Control PX3 EX3 IE3 IT3 PX2 EX2 IE2 IT2 0000,0000
中断与普通8052完全兼容， 先 可
INT3/P4.2。
4 ，另增加2个外部中断INT2/P4.3,
Vector
Polling
Interrupt
Source
中断源
Interrupt
Request
中断 求
Address Sequence 中断
中断
向量地址
先 0
置 最低
先 3
最高
先 1
先 2
中断
先
次序
/INT0
0003H
000BH
0013H
001BH
0023H
002BH
0033H
003BH
0(最 先) PX0H,PX0
0,0
0,0
0,0
0,0
0,0
0,0
0,0
0,0
0,1
1,0
1,1
1,1
1,1
1,1
1,1
1,1
1,1
1,1
IE0
Timer 0
/INT1
1
PT0H,PT0
PX1H,PX1
PT1H,PT1
PSH, PS
PT2H,PT2
PX2H,PX2
PX3H,PX3
0,1
0,1
0,1
0,1
0,1
0,1
0,1
1,0
1,0
1,0
1,0
1,0
1,0
1,0
TF0
2
IE1
Timer 1
UART
3
IF1
4
RI + TI
TF2 + EXF2
IE2
Timer 2
/INT2
5
6
/INT3
7(最低)
IE3
Name Function
PX3 External interrupt 3 priority high if set
EX3 External interrupt 3 enable if set
IE3 IE3 is set/cleared automatically by hardware when interrupt is detected/serviced
IT3 External interrupt 3 is falling-edge/low-level triggered when this bit is set/cleared by software
PX2 External interrupt 2 priority high if set
EX2 External interrupt 2 enable if set
IE2 IE2 is set/cleared automatically by hardware when interrupt is detected/serviced
IT2 External interrupt 2 is falling-edge/low-level triggered when this bit is set/cleared by software
PXH3 External interrupt 3 priority highest if set
PXH2 External interrupt 2 priority highest if set
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STC 增 型8051 片机中文指南(RC/RD+系列)
13
ETC [ ETC ]
