PIC18FXX2
1.0
DEVICE OVERVIEW
This document contains device specific information for
the following devices:
• PIC18F242
• PIC18F252
• PIC18F442
• PIC18F452
The following two figures are device block diagrams
sorted by pin count: 28-pin for Figure 1-1 and 40/44-pin
for Figure 1-2. The 28-pin and 40/44-pin pinouts are
listed in Table 1-2 and Table 1-3, respectively.
These devices come in 28-pin and 40/44-pin packages.
The 28-pin devices do not have a Parallel Slave Port
(PSP) implemented and the number of Analog-to-
Digital (A/D) converter input channels is reduced to 5.
An overview of features is shown in Table 1-1.
TABLE 1-1:
DEVICE FEATURES
PIC18F242
DC - 40 MHz
16K
8192
768
256
17
Ports A, B, C
4
2
MSSP,
Addressable
USART
—
5 input channels
POR, BOR,
RESET
Instruction,
Stack Full,
Stack Underflow
(PWRT, OST)
Yes
Yes
75 Instructions
28-pin DIP
28-pin SOIC
PIC18F252
DC - 40 MHz
32K
16384
1536
256
17
Ports A, B, C
4
2
MSSP,
Addressable
USART
—
5 input channels
POR, BOR,
RESET
Instruction,
Stack Full,
Stack Underflow
(PWRT, OST)
Yes
Yes
75 Instructions
28-pin DIP
28-pin SOIC
PIC18F442
DC - 40 MHz
16K
8192
768
256
18
4
2
MSSP,
Addressable
USART
PSP
8 input channels
PIC18F452
DC - 40 MHz
32K
16384
1536
256
18
4
2
MSSP,
Addressable
USART
PSP
8 input channels
Features
Operating Frequency
Program Memory (Bytes)
Program Memory (Instructions)
Data Memory (Bytes)
Data EEPROM Memory (Bytes)
Interrupt Sources
I/O Ports
Timers
Capture/Compare/PWM Modules
Serial Communications
Parallel Communications
10-bit Analog-to-Digital Module
Ports A, B, C, D, E Ports A, B, C, D, E
RESETS (and Delays)
POR, BOR,
POR, BOR,
RESET
Instruction,
RESET
Instruction,
Stack Full,
Stack Full,
Stack Underflow
Stack Underflow
(PWRT, OST)
(PWRT, OST)
Yes
Yes
75 Instructions
40-pin DIP
44-pin PLCC
44-pin TQFP
Yes
Yes
75 Instructions
40-pin DIP
44-pin PLCC
44-pin TQFP
Programmable Low Voltage
Detect
Programmable Brown-out Reset
Instruction Set
Packages
2002 Microchip Technology Inc.
DS39564B-page 7
ETC [ ETC ]
