I90135
Product Data Sheet
Version 1.2 (June 1999)
Pin Assignment and Description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
Mnemonic
VSS
AD_0
AD_1
AD_2
VDD
AD_3
AD_4
VSS
AD_5
AD_6
VDD
AD_7
AD_8
AD_9
VSS
AD_10
AD_11
VDD
AD_12
VSS
PCLK
VDD
AD_13
AD_14
AD_15
VSS
BE1
ALE
VDD
CSB
WR_RDB
RDYB
OBC_TYPE
INTB
RESETB
VSS
VDD
U_RxData_0
U_RxData_1
Type
B
B
B
B
B
B
B
B
B
B
B
B
B
Supply
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
B
B
B
I
I
VDD
VDD
VDD
VDD
VDD
Driver
BD8SCR
BD8SCR
BD8SCR
BD8SCR
BD8SCR
BD8SCR
BD8SCR
BD8SCR
BD8SCR
BD8SCR
BD8SCR
BD8SCR
BD8SCR
IBUF
BD8SCR
BD8SCR
BD8SCR
IBUF
IBUF
BS
B
B
B
B
B
B
B
+3.3 Volts power supply
B
B
B
0 Volt GROUND
B
B
+3.3 Volts power supply
B
I
B
B
B
I
C
0 Volt GROUND
Address [1] input
Used to latch the address of the
internal register to be accessed
+3.3 volts power supply
Chip selected to respond to bus
cycle
Specifies the direction of the access
cycle
ATC Mode Selection
Requests ATC interrupts service
Hard reset
0 Volt GROUND
+3.3 Volts power supply
UTOPIA RX Data 0
UTOPIA RX Data 1
0 Volt GROUND
Processor clock
+3.3 Volts power supply
Description
0 Volt GROUND
Micro processor interface
Address / Data 1
Address / Data 2
+3.3 Volts power supply
Address / Data 3
Address / Data 4
0 Volt GROUND
I
I
OZ
I-PD
O
I
VDD
VDD
VDD
VDD
VDD
VDD
IBUF
IBUF
BT4CR
IBUF
IBUF
IBUF
I
I
O
I
O
I
OZ
OZ
VDD
VDD
BD8SCR
BD8SCR
B
B
Integrated Telecom Express, Inc.
6
ETC [ ETC ]
