MAX 7000A Programmable Logic Device Data Sheet
Table 3. MAX 7000A Maximum User I/O Pins
Device
44-Pin
PLCC
44-Pin
TQFP
49-Pin
Ultra
FineLine
BGA
(2)
41
Note (1)
84-Pin
PLCC
100-Pin 100-Pin
TQFP FineLine
BGA
(3)
EPM7032AE
EPM7064AE
EPM7128A
(4)
EPM7128AE
EPM7256A
(4)
EPM7256AE
EPM7512AE
36
36
36
36
68
68
68
84
84
84
84
68
84
84
Table 4. MAX 7000A Maximum User I/O Pins
Device
144-Pin
TQFP
169-Pin
Ultra
FineLine
BGA
(2)
Note (1)
256-Pin
BGA
256-Pin
FineLine
BGA
(3)
208-Pin
PQFP
EPM7032AE
EPM7064AE
EPM7128A
(4)
EPM7128AE
EPM7256A
(4)
EPM7256AE
EPM7512AE
Notes to tables:
(1)
(2)
When the IEEE Std. 1149.1 (JTAG) interface is used for in-system programming or
boundary-scan testing, four I/O pins become JTAG pins.
All Ultra FineLine BGA packages are footprint-compatible via the SameFrame
TM
feature. Therefore, designers can design a board to support a variety of devices,
providing a flexible migration path across densities and pin counts. Device
migration is fully supported by Altera development tools. See
“SameFrame Pin-
Outs” on page 15
for more details.
All FineLine BGA packages are footprint-compatible via the SameFrame feature.
Therefore, designers can design a board to support a variety of devices, providing
a flexible migration path across densities and pin counts. Device migration is fully
supported by Altera development tools. See
“SameFrame Pin-Outs” on page 15
for
more details.
Altera does not recommend using EPM7128A or EPM7256A devices for new
designs. Use EPM7128AE or EPM7256AE devices for these designs instead.
100
100
120
120
120
100
164
164
176
212
100
100
164
164
212
(3)
(4)
4
Altera Corporation
ETC [ ETC ]
