Chapter 2 Function Block
Chapter 2 Function Block
Switching speed
D-F/F
Function
Block
type
Input
Output
Path
→
t LD0 (ns)
t 1
Standard type
Low Gate type
Block type
IN
OUT
MIN.
TYP. MAX.
MIN.
0.011
0.010
0.011
0.010
TYP. MAX. Symbol Fanin Symbol Fanout
Normal
Q output
QB output
Normal
Q output
QB output
(HH) 0.358
(HL) 0.401
(HH) 0.491
(HL) 0.481
0.570
0.370
0.669
(HH) 0.358
(HL) 0.401
0.560
0.350
0.567
(HH) 0.358
(HL) 0.400
0.570
0.370
0.566
(HH) 0.329
(HL) 0.338
0.570
0.551
0.652
0.813
0.762
0.994
1.211
1.552
1.397
1.090
0.310
1.924
0.992
1.212
0.860
0.140
1.584
0.993
1.211
1.100
0.310
1.584
0.989
0.953
1.040
0.310
1.362
0.015
0.013
0.015
0.013
0.021
0.017
0.021
0.017
D
C
1.0
1.0
Q
35
35
F641
C
C
→
Q
Drivability
Name cells
Name cells
Name cells
Name cells
Name cells
Name cells
QB
→
QB
Low Power
L641
6
F641
8
F641NQ
7
F641NB
7
x1
x2
x4
Set up time
Hold time
Min Pulse
D
D
C
0.551
0.651
0.022
0.020
0.030
0.025
0.042
0.034
D
C
1.0
1.0
Q
Q
17
35
34
L641
C
→
Q
Logic Diagram for "Normal"
Truth Table for "Normal"
Set up time
Hold time
Min Pulse
D
D
C
D
C
Q
QB
D
C
H01
H02
N01
Q
0.550
0.650
0.011
0.010
0.015
0.013
0.021
0.017
D
C
1.0
1.0
F641NQ
F641NB
C
→
Q
0
1
X
0
1
1
0
Set up time
Hold time
Min Pulse
D
D
C
Hold
N02 QB
X:Irrelevant
0.529
0.537
0.011
0.011
0.015
0.014
0.022
0.020
D
C
1.0
1.0
QB
C
→
QB
Set up time
Hold time
Min Pulse
D
D
C
0.370
0.528
Logic Diagram for "Q output"
Truth Table for "Q output"
D
C
Q
D
H01
N01
Q
0
1
X
0
1
Hold
C
H02
X:Irrelevant
Logic Diagram for "QB output"
Truth Table for "QB output"
D
C
QB
D
H01
0
1
X
1
0
Hold
C
H02
N01 QB
X:Irrelevant
Block Library A13872EJ5V0BL
2 - 264
Block Library A13872EJ5V0BL
2 - 265
ETC [ ETC ]
