2.8 Memory Map...................................................................................................................... 49
2.9 Application Notes .............................................................................................................. 55
2.9.1 Notes on Data Access ........................................................................................... 55
2.9.2 Notes on Bit Manipulation.................................................................................... 57
2.9.3 Notes on Use of the EEPMOV Instruction........................................................... 63
Section 3 Exception Handling........................................................................................ 64
3.1 Overview............................................................................................................................ 64
3.2 Reset................................................................................................................................... 64
3.2.1 Overview............................................................................................................... 64
3.2.2 Reset Sequence ..................................................................................................... 64
3.2.3 Interrupt Immediately after Reset......................................................................... 65
3.3 Interrupts............................................................................................................................ 66
3.3.1 Overview............................................................................................................... 66
3.3.2 Interrupt Control Registers ................................................................................... 68
3.3.3 External Interrupts ................................................................................................ 78
3.3.4 Internal Interrupts.................................................................................................. 78
3.3.5 Interrupt Operations.............................................................................................. 79
3.3.6 Interrupt Response Time....................................................................................... 84
3.4 Application Notes .............................................................................................................. 85
3.4.1 Notes on Stack Area Use...................................................................................... 85
3.4.2 Notes on Rewriting Port Mode Registers ............................................................. 86
Section 4 Clock Pulse Generators................................................................................. 88
4.1 Overview............................................................................................................................ 88
4.1.1 Block Diagram...................................................................................................... 88
4.1.2 System Clock and Subclock.................................................................................. 88
4.2 System Clock Generator .................................................................................................... 89
4.3 Subclock Generator............................................................................................................ 92
4.4 Prescalers ........................................................................................................................... 94
4.5 Note on Oscillators ............................................................................................................ 95
Section 5 Power-Down Modes ...................................................................................... 96
5.1 Overview............................................................................................................................ 96
5.1.1 System Control Registers...................................................................................... 99
5.2 Sleep Mode ........................................................................................................................ 104
5.2.1 Transition to Sleep Mode...................................................................................... 104
5.2.2 Clearing Sleep Mode ............................................................................................ 104
5.2.3 Clock Frequency in Sleep (Medium-Speed) Mode .............................................. 105
5.3 Standby Mode.................................................................................................................... 106
5.3.1 Transition to Standby Mode.................................................................................. 106
5.3.2 Clearing Standby Mode........................................................................................ 106
5.3.3 Oscillator Settling Time after Standby Mode is Cleared...................................... 106
ii
ETC [ ETC ]
