SCSR1—Serial control status register 1
H'A1
SCI1
Bit
7
—
1
6
5
4
—
1
3
—
1
2
—
1
1
MTRF
0
0
SOL
0
ORER
0
STF
0
Initial value
Read/Write
—
R/W
R/(W)*
—
—
—
R
R/W
Start flag
0
Read Transfer operation stopped
Write Invalid
1
Read Transfer operation in progress
Write Starts transfer operation
Tail mark transmission flag
0
1
Idle state, or 8-bit/16-bit data transfer in progress
Tail mark transmission in progress
Overrun error flag
0
Clearing conditions:
After reading ORER = 1, cleared by writing 0 to ORER
1
Setting conditions:
When an external clock is used and the clock is input
after transfer is completed
Extension data bit
0
Read SO1 pin output level is low
Write Changes SO1 pin output to low level
Read SO1 pin output level is high
1
Write Changes SO1 pin output to high level
Note: * Only a write of 0 for flag clearing is possible.
429
ETC [ ETC ]
