Table A-4 Number of Cycles in Each Instruction (cont)
Instruction Branch
Stack
Byte Data Word
Internal
Operation
N
Instruc-
tion
Fetch
I
Addr. Read Operation Access Data
J
Mnemonic
K
L
Access
M
BTST
BTST #xx:3, Rd
BTST #xx:3, @Rd
BTST #xx:3, @aa:8
BTST Rn, Rd
1
2
2
1
2
2
1
2
2
1
1
1
1
1
1
1
2
1
2
2
2
2
2
2
1
1
1
1
1
2
1
1
BTST Rn, @Rd
BTST Rn, @aa:8
BXOR #xx:3, Rd
BXOR #xx:3, @Rd
BXOR #xx:3, @aa:8
CMP. B #xx:8, Rd
CMP. B Rs, Rd
CMP.W Rs, Rd
DAA.B Rd
1
1
BXOR
CMP
1
1
DAA
DAS
DAS.B Rd
DEC
DIVXU
DEC.B Rd
DIVXU.B Rs, Rd
12
1
EEPMOV EEPMOV
2n+2*
INC
INC.B Rd
JMP
JMP @Rn
JMP @aa:16
JMP @@aa:8
JSR @Rn
2
2
1
1
JSR
1
1
1
JSR @aa:16
JSR @@aa:8
LDC #xx:8, CCR
LDC Rs, CCR
MOV.B #xx:8, Rd
MOV.B Rs, Rd
MOV.B @Rs, Rd
2
LDC
MOV
1
1
MOV.B @(d:16, Rs),
Rd
MOV.B @Rs+, Rd
MOV.B @aa:8, Rd
MOV.B @aa:16, Rd
MOV.B Rs, @Rd
1
1
2
1
1
1
1
1
2
Note:
*
n: Initial value in R4L. The source and destination operands are accessed n + 1 times
each.
411
ETC [ ETC ]
