1.2
Internal Block Diagram
Figure 1-1 shows a block diagram of the H8/3887 and H8/3847 Series.
V0
V1
V2
V3
P10/TMOW
P11/TMOFL
H8/300L
CPU
P12/TMOFH
P13/TMIG
PA3/COM4
PA2/COM3
PA1/COM2
PA0/COM1
P14/IRQ4/ADTRG
P15/IRQ1/TMIC
P16/IRQ2
P17/IRQ3/TMIF
ROM
RAM
(2 k and 1 k)
(60 k, 48 k, 40 k, 32 k,
24 k, and 16 k)
P97/SEG40/CL1
P96/SEG39/CL2
P95/SEG38/DO
P94/SEG37/M
P93/SEG36
P20/SCK1
P21/SI1
P22/SO1
P23
Serial
communication
interface 1
P24
Timer-A
P92/SEG35
P25
P91/SEG34
P26
P90/SEG33
P27
Serial
communication
interface 3-1
P87/SEG32
P86/SEG31
P85/SEG30
P84/SEG29
P83/SEG28
P82/SEG27
P81/SEG26
P80/SEG25
Timer-C
Timer-F
P30/PWM
P31/UD
P32/RESO
P33/SCK31
P34/RXD31
P35/TXD31
P36/AEVH
P37/AEVL
Serial
communication
interface 3-2
P77/SEG24
P76/SEG23
P75/SEG22
P74/SEG21
P73/SEG20
P72/SEG19
P71/SEG18
P70/SEG17
14-bit PWM
P40/SCK32
P41/RXD32
P42/TXD32
P43/IRQ0
Timer-G
LCD
controller/driver
P50/WKP0/SEG1
P51/WKP1/SEG2
P52/WKP2/SEG3
P53/WKP3/SEG4
P54/WKP4/SEG5
P55/WKP5/SEG6
P56/WKP6/SEG7
P57/WKP7/SEG8
WDT
P67/SEG16
P66/SEG15
P65/SEG14
P64/SEG13
P63/SEG12
P62/SEG11
P61/SEG10
P60/SEG9
A/D (10-bit)
Asynchronous
counter
Port B
Port C
Figure 1-1 Block Diagram
7
ETC [ ETC ]
