RTL8100C & RTL8100CL
Datasheet
2. Features
ꢀ 128-pin QFP/LQFP
ꢀ Supports 4 Wake-On-LAN (WOL) signals
(active high, active low, positive pulse, and
negative pulse)
ꢀ Integrated Fast Ethernet MAC, Physical chip,
and transceiver in one chip
ꢀ Supports auxiliary power-on internal reset, to
be ready for remote wake-up when main
power remains off
ꢀ 10Mbps and 100Mbps operation
ꢀ Supports 10Mbps and 100Mbps NWay
auto-negotiation
ꢀ Supports auxiliary power auto-detect, and sets
the related capability of power management
registers in PCI configuration space
ꢀ PCI local bus single-chip Fast Ethernet
controller
ꢀ Includes programmable PCI burst size and
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Complies with PCI Revision 2.2
early Tx/Rx threshold
Supports PCI clock 16.75MHz-40MHz
ꢀ Supports a 32-bit general-purpose timer, with
the external PCI clock as clock source, for
generating timer-interrupts
Supports PCI target fast back-to-back
transaction
ꢁ
Provides PCI bus master data transfers and
PCI memory space or I/O space mapped
data transfers of the RTL8100C(L)’s
operational registers
ꢀ Contains two (2Kbyte) independent receive
and transmit FIFOs
ꢀ Advanced power saving mode when LAN and
wakeup function are not used
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Supports PCI VPD (Vital Product Data)
Supports ACPI, PCI power management
ꢀ Uses 93C46 (64*16-bit EEPROM) to store
resource configuration, ID parameter, and
VPD data
ꢀ Supports 25MHz crystal or 25MHz OSC as the
internal clock source. The frequency deviation
of either crystal or OSC must be within
50PPM.
ꢀ Supports LED pins for various network
activity indications
ꢀ Supports loopback capability
ꢀ Half/Full duplex capability
ꢀ Complies with the PC99/PC2001 standard
ꢀ Supports Wake-On-LAN and remote wake-up
(Magic Packet*, LinkChg, and Microsoft®
wake-up frame)
ꢀ Supports Full Duplex Flow Control
(IEEE 802.3x)
ꢀ 2.5/3.3V power supply with 5V tolerant I/Os.
ꢀ 0.25µm CMOS process
* Third-party brands and names are the property of their respective owners.
Note: The QFP package model number is RTL8100C. The LQFP package model number is RTL8100CL.
Single-Chip Fast Ethernet Controller
2
Track ID: JATR-1076-21 Rev. 1.06
ETC [ ETC ]
