PRELIMINARY
PCT1789W DATA SHEET
PCT789T-A PCI CONFIGURATION REGISTERS
!!
Power Management Capability
(40h, R)
PMED3C PMED3H PMED2
0
PMED0 D2PMS
0
AUXC[2:0]
0
0
0
PMEV[2:0]
31
30
29
28
27
26
25
24
23
22
6
21
20
19
18
2
17
16
0
0
0
0
0
0
0
0
CAPID[7:0]
15
14
13
12
11
10
9
8
7
5
4
3
1
0
Bit Definitions:
Bits
Name
Description
31
PMED3C
Assert PME# from D3cold (R: 1b or 0b). Indicates that PME# can be asserted
from D3cold state when VAUXDET input is high (Vaux power is present). When
Vaux power is not present, this bit returns 0.
30
29
PMED3H
PMED2
Assert PME# from D3hot (R: 1b). Indicates that PME# can be asserted from
D3hot state.
Assert PME# from D2 (R: 1b). Indicates that PME# can be asserted from D2
state.
28
27
Reserved
PMED0
Reserved. Read returns zero.
Assert PME# from D0 (R: 1b). Indicates that PME# can be asserted from D0
state.
26
25
D2PMS
D2 state support (R: 1b). Indicates that the HSP modem function supports the D2
power management state.
Reserved
Reserved. Read returns zero.
24:22
AUXC[2:0]
Auxiliary current (R: 001b). Indicates the 3.3Vaux auxiliary current requirement
for the PC-TEL HSP modem module. For 3.3Vaux current requirement reporting
from the Data register, use a value of 000b.
21:19
18:16
Reserved
Reserved. Read returns zero.
PMEV[2:0]
Version (R: 010b). Indicates which revision of the PCI Power Management Inter-
face Specification that the PC-TEL HSP modem module complies with.
15:8
7:0
Reserved
Reserved. Read returns zero.
CAPID[7:0]
Capability ID (R: 01h). Indicates that the linked list item is the PCI Power Man-
agement registers.
PRELIMINARY
PC-TEL, Inc.
34
1789W0DOCDAT06A-0299