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Chapter 6, Specifications, presents the electrical and timing
specifications for the L64777. It also presents the pinout and
packaging information.
Appendix A, Programming the L64777 in Serial Host Interface
Mode, discusses how to program the L64777 internal registers and
data tables in serial host interface mode.
Appendix B, PLL Divider Settings and L64724/34 Connection,
lists the PLL divider settings for typical applications. It also describes
the L64777 connection to the L64724.
Appendix C, Monitoring Device Internal Signals, describes how to
program test register (14) for monitoring of device internal signals.
Related Publications
Digital Broadcasting Systems for Television Sound and Data Services:
Framing Structure, Channel Coding and Modulation Cable Systems
ETS 300 429, September 1996.
Generic Coding of Moving Pictures and Associated Audio,
ISO/IEC 13818-1, MPEG2 Systems, November 1994.
®
G10 -p CW900100 10-Bit Direct Digital Synthesis Digital-to-Analog
Converter, Preliminary Datasheet, LSI Logic, September 1998.
L64724 Satellite Receiver Technical Manual, LSI Logic, April 2000, order
number I14030.
Conventions Used in This Manual
The word assert means to drive a signal true or active. The word
deassert means to drive a signal false or inactive.
Hexadecimal numbers are indicated by the prefix “0x” —for example,
0x32CF. Binary numbers are indicated by the prefix “0b” —for example,
0b0011.0010.1100.1111.
iv
Preface