HT46R47
converter request flag (ADF), enable
timer/event counter bit (ETI), enable external
interrupt bit (EEI), enable A/D converter inter-
rupt bit (EADI) and enable master interrupt bit
(EMI) constitute an interrupt control register
(INTC) which is located at 0BH in the data
memory. EMI, EEI, ETI, EADI are used to con-
trol the enabling/disabling of interrupts. These
bits prevent the requested interrupt from being
serviced. Once the interrupt request flags (TF,
EIF, ADF) are set, they will remain in the INTC
register until the interrupts are serviced or
cleared by a software instruction.
mode stops the system oscillator and ignores an
external signal to conserve power.
If an RC oscillator is used, an external resistor
between OSC1 and VSS is required and the re-
sistance must range from 30kW to 750kW. The
system clock, divided by 4, is available on
OSC2, which can be used to synchronize exter-
nal logic. The RC oscillator provides the most
cost effective solution. However, the frequency
of oscillation may vary with VDD, tempera-
tures and the chip itself due to process varia-
tions. It is, therefore, not suitable for timing
sensitive operations where an accurate oscilla-
tor frequency is desired.
It is recommended that a program does not
use the "CALL subroutine" within the inter-
rupt subroutine. Interrupts often occur in an
unpredictable manner or need to be serviced
immediately in some applications. If only one
stack is left and enabling the interrupt is not
well controlled, the original control sequence will
be damaged once the "CALL" operates in the in-
terrupt subroutine.
If the Crystal oscillator is used, a crystal across
OSC1 and OSC2 is needed to provide the feed-
back and phase shift required for the oscillator,
and no other external components are required.
Instead of a crystal, a resonator can also be con-
nected between OSC1 and OSC2 to get a fre-
quency reference, but two external capacitors
in OSC1 and OSC2 are required (If the oscillat-
ing frequency is less than 1MHz).
Oscillator configuration
The WDT oscillator is a free running on-chip RC
oscillator, and no external components are re-
quired. Even if the system enters the power down
mode, the system clock is stopped, but the WDT
oscillator still works with a period of approxi-
mately 72ms/5V. The WDT oscillator can be dis-
abled by ROM code option to conserve power.
There are two oscillator circuits in the
microcontroller.
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The clock source of WDT is implemented by a
dedicated RC oscillator (WDT oscillator) or in-
struction clock (system clock divided by 4), de-
cided by ROM code option. This timer is
designed to prevent a software malfunction or
sequence from jumping to an unknown location
with unpredictable results. The Watchdog
System oscillator
Both are designed for system clocks, namely
the RC oscillator and the Crystal oscillator,
which are determined by the ROM code option.
No matter what oscillator type is selected, the
signal provides the system clock. The HALT
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Watchdog Timer
12
Rev. 1.40
July 18, 2001
ETC [ ETC ]
