Version: 1.18
PRELIMINARY/CONFIDENTIAL
TrueSpeech® Co-Processor
9.24
Power Save Modes
9.24.1
CT8022 Stop Mode
The CT8022 can be placed into Stop Mode using the following command:
Command: 0FF0H
Since the CT8022 halts all internal operations in response to this command, there is no status response.
The CT8022 can only be released from Stop mode using the external RESET pin. After reset, the CT8022 performs
internal initializations and then asserts the Control Ready bit in the Hardware Status Register. The Host must wait
for the Control Ready bit to be set before issuing the first command. Following reset, the Host must re-program the
CODEC configuration before attempting any other operations.
In stop mode, the CODEC signals FSYNC and SCLK are also stopped.
9.24.2
Stop CODEC Mode
Command: 0FF2H
Status:
0FF2H
In Stop CODEC mode, the CT8022 FSYNC and SCLK output pins are forced low. Holding FSYNC low and
stopping SCLK will cause some CODECs to enter power down mode. See your CODEC data sheet to see if this
feature is supported.
To achieve maximum system power saving, the CODEC interface should be placed in stop mode before placing the
CT8022 itself in stop mode. Following this sequence will guarantee that FSYNC halts in low state.
Note: If pull-up/down resistors are connected to the FSYNC and SCLK pins to provide proper input
voltages during reset, use of pull-down resistors will result in lower power consumption when the
CODEC is in stop mode. However, pull-up resistors may be used if desired.
9.24.3
Re-Start CODEC
The CODEC can be re-started using the following command:
Command: 0FF3H
Status:
0FF3H
CT8022A11AQC FW Revision 0118 DSP GROUP, INC., 3120 SCOTT BOULEVARD
SANTA CLARA, CA 95054 PH: 408 986 – 4300 FAX: 408 986 – 4490
155
All specifications are subject to change without prior notice.
ETC [ ETC ]
