ACEX 1K Programmable Logic Device Family Data Sheet
s
s
s
Software design support and automatic place-and-route provided by
Altera development systems for Windows-based PCs and Sun
SPARCstation, and HP 9000 Series 700/800 workstations
Flexible package options are available in 100 to 484 pins, including
the innovative FineLine BGA
TM
packages (see
Tables 2
and
3)
Additional design entry and simulation support provided by EDIF
2 0 0 and 3 0 0 netlist files, library of parameterized modules (LPM),
DesignWare components, Verilog HDL, VHDL, and other interfaces
to popular EDA tools from manufacturers such as Cadence,
Exemplar Logic, Mentor Graphics, OrCAD, Synopsys, Synplicity,
VeriBest, and Viewlogic
Notes (1), (2)
208-Pin PQFP
120
147
147
147
Table 2. ACEX 1K Package Options & I/O Pin Count
Device
EP1K10
EP1K30
EP1K50
EP1K100
Notes:
(1)
(2)
(3)
100-Pin TQFP
66
144-Pin TQFP
92
102
102
256-Pin
FineLine BGA
136
171
186
484-Pin
FineLine BGA
136
(3)
171
(3)
249
333
13
Tools
ACEX 1K device package types include thin quad flat pack (TQFP), plastic quad flat pack (PQFP), and FineLine
BGA packages.
Devices in the same package are pin-compatible, although some devices have more I/O pins than others. When
planning device migration, use the I/O pins that are common to all devices.
This option is supported with a 256-pin FineLine BGA package. By using SameFrame
TM
pin migration, all FineLine
BGA packages are pin-compatible. For example, a board can be designed to support 256-pin and 484-pin FineLine
BGA packages.
Table 3. ACEX 1K Package Sizes
Device
Pitch (mm)
Area (mm )
Length
×
width
(mm
×
mm)
2
100-Pin TQFP
0.50
256
16
×
16
144-Pin TQFP
0.50
484
22
×
22
208-Pin PQFP
0.50
936
30.6
×
30.6
256-Pin
FineLine BGA
1.0
289
17
×
17
484-Pin
FineLine BGA
1.0
529
23
×
23
Altera Corporation
3
ETC [ ETC ]
