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CXD3018Q/R 参数 Datasheet PDF下载

CXD3018Q/R图片预览
型号: CXD3018Q/R
PDF下载: 下载PDF文件 查看货源
内容描述: CD数字信号处理器,内置DigitalServo和DAC [CD Digital Signal Processor with Built-in DigitalServo and DAC ]
分类和应用: 数字信号处理器
文件页数/大小: 134 页 / 942 K
品牌: ETC [ ETC ]
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CXD3018Q/R  
$DX commands  
Data 1  
Data 3  
D1  
D2  
Data 2  
Command  
D0  
D3  
D2  
TB  
D1  
TP  
D0  
D3  
D2  
VP6  
D1  
D0  
D3  
Gain  
CLVS  
0
VP7  
VP5  
VP4  
VP0  
VP3  
VP2  
VP1  
CLV CTRL  
See the $CX commands.  
Command bit  
TB = 0  
Description  
Bottom hold at a cycle of RFCK/32 in CLVS mode.  
Bottom hold at a cycle of RFCK/16 in CLVS mode.  
Peak hold at a cycle of RFCK/4 in CLVS mode.  
Peak hold at a cycle of RFCK/2 in CLVS mode.  
TB = 1  
TP = 0  
TP = 1  
The rotational velocity R of the spindle can be  
expressed with the following equation.  
Command bit  
Description  
VP0 to VP7 = F0 (H)  
Playback at half (normal) speed  
256 n  
:
to  
R =  
32  
Playback at normal (double)  
VP0 to VP7 = E0 (H)  
:
speed  
R: Relative velocity at normal speed = 1  
n: VP0 to VP7 setting value  
to  
Playback at (quadruple) speed  
VP0 to VP7 = C0 (H)  
Note) • Values in parentheses are for when DSPB is 1.  
Values when crystal is 16.9344MHz and XTSL is low or when crystal is 33.8688MHz and XTSL is high.  
VP0 to VP7 setting values are valid in CAV-W mode.  
4
3.5  
3
2.5  
2
1.5  
1
0.5  
F0  
E0  
D0  
C0  
VP0 to VP7 setting value [HEX]  
Fig. 1-1  
49 –  
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