CXA1782CQ/CR
Focus Servo
FE
9k
51k
FEO
FEI
FZC
1
2
10k
22k
DFCT
FS4
2200p
0.47µ
100k
68k
FOCUS COIL
FE_O
FE_M
Focus
phase
Compensation
100k
6
3
4
FDFCT
FGD
100k
50k
7
680k
0.1µ
40k
11µ 22µ
120k
ISET
17
50k
FS1
FS2
FLB
FSET
11
SRCH
5
8
0.1µ
510k
0.01µ
4.7µ
The above figure shows a block diagram of the focus servo.
Ordinarily the FE signal is input to the focus phase compensation circuit through a 68kΩ resistance; however,
when DFCT is detected, the FE signal is switched to pass through a low-pass filter formed by the internal
100kΩ resistance and the capacitance connected to Pin 3. When this DFCT prevention circuit is not used,
leave Pin 3 open. The defect switch operation can be enabled and disabled with command.
The capacitor connected between Pin 5 and GND is a time constant to raise the low frequency in the normal
playback state.
The peak frequency of the focus phase compensation is approximately 1.2kHz when a resistance of 510Ω is
connected to Pin 11.
The focus search height is approximately ±1.1Vp-p when using the constants indicated in the above figure.
This height is inversely proportional to the resistance connected between Pin 17 and VEE. However, changing
this resistance also changes the height of the track jump and sled kick as well.
The FZC comparator inverted input is set to 15% of VCC and VC (Pin 48); (VCC – VC) × 15%.
510kΩ resistance is recommended for Pin 11.
– 18 –