Z80180/Z8S180/Z8L180
Enhanced Z180 Microprocessor
Zilog
Table 2. Pin Status During RESET BUSACK and SLEEP
Pin Number and Package Type
Pin Status
1
Default
Function
Secondary
Function
SLEEP
QFP
PLCC
DIP
RESET
BUSACK
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
45
46
47
48
49
50
42
43
44
45
46
47
/RTS0
/CTS0
/DCD0
TXA0
RXA0
CKA0
NC
1
IN
IN
1
OUT
OUT
IN
1
IN
IN
OUT
IN
OUT
IN
IN
3T
/DREQ0
OUT
OUT
51
52
53
54
55
56
57
58
59
60
48
TXA1
TEST
RXA1
CKA1
TXS
1
OUT
OUT
49
50
51
52
53
54
55
56
IN
3T
1
IN
IN
IN
IN
/TEND0
/CTS1
OUT
IN
OUT
IN
RXS
IN
3T
IN
1
CKS
I/O
3T
I/O
IN
/DREQ1
/TEND1
/HALT
NC
OUT
1
1
1
0
NC
61
62
63
64
65
66
67
68
1
57
58
59
60
61
62
63
64
1
/RFSH
/IORQ
/MREQ
E
1
OUT
3T
OUT
1
1
1
0
3T
1
OUT
1
OUT
1
/M1
1
/WR
1
3T
1
/RD
1
3T
1
PHI
OUT
GND
OUT
GND
OUT
GND
V
V
SS
SS
73
2
3
GND
OUT
GND
OUT
GND
OUT
74
75
76
77
78
79
80
2
XTAL
NC
4
5
6
7
8
3
4
5
6
7
EXTAL
/WAIT
IN
IN
1
IN
IN
IN
IN
/BUSACK
/BUSREQ
/RESET
OUT
IN
OUT
IN
IN
IN
IN
IN
DS971800401
P R E L I M I N A R Y
1-9
ZILOG [ ZILOG, INC. ]
