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Z8FMC04100QKSG 参数 Datasheet PDF下载

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型号: Z8FMC04100QKSG
PDF下载: 下载PDF文件 查看货源
内容描述: Z8喝采-R电机控制闪存MCU [Z8 Encore-R Motor Control Flash MCUs]
分类和应用: 闪存微控制器和处理器外围集成电路电机时钟
文件页数/大小: 402 页 / 4558 K
品牌: ZILOG [ ZILOG, INC. ]
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Z8 Encore!® Motor Control Flash MCUs  
Product Specification  
312  
Bit  
Value  
(H)  
Description  
Position  
[6]  
Timer Input/Output Polarity  
TPOL  
This bit is a function of the current operating mode of the timer. It determines the  
polarity of the input and/or output signal. When the timer is disabled, the Timer  
Output signal is set to the value of this bit.  
ONE-SHOT mode–If the timer is enabled the Timer Output signal pulses  
(changes state) for one system clock cycle after timer Reload.  
CONTINUOUS mode–If the timer is enabled the Timer Output signal is  
complemented after timer Reload.  
COUNTER mode–If the timer is enabled the Timer Output signal is  
complemented after timer reload.  
0 = Count occurs on the rising edge of the Timer Input signal.  
1 = Count occurs on the falling edge of the Timer Input signal.  
PWM SINGLE OUTPUT mode–When enabled, the Timer Output is forced to  
TPOL after PWM count match and forced back to TPOL after Reload.  
CAPTURE mode–If the timer is enabled the Timer Output signal is  
complemented after timer Reload.  
0 = Count is captured on the rising edge of the Timer Input signal.  
1 = Count is captured on the falling edge of the Timer Input signal.  
COMPARE mode–The Timer Output signal is complemented after timer  
Reload.  
GATED mode–The Timer Output signal is complemented after timer Reload.  
0 = Timer counts when the Timer Input signal is High and interrupts are  
generated on the falling edge of the Timer Input.  
1 = Timer counts when the Timer Input signal is Low and interrupts are  
generated on the rising edge of the Timer Input.  
CAPTURE/COMPARE mode–If the timer is enabled, the Timer Output signal is  
complemented after timer Reload  
0 = Counting starts on the first rising edge of the Timer Input signal. The current  
count is captured on subsequent rising edges of the Timer Input signal.  
1 = Counting starts on the first falling edge of the Timer Input signal. The  
current count is captured on subsequent falling edges of the Timer Input signal.  
PS024604-1005  
P R E L I M I N A R Y  
Appendix A—Register Tables  
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