Z8 Encore!® Motor Control Flash MCUs
Product Specification
200
REFEN
VR2
Internal Voltage
Reference Generator
V
RBUF
REF
Analog-to-Digital
Converter
ANA0
10
Data
ANA1
ANA2
ANA3
ANA4
ANA5
ANA6
ANA7
Reference Input
Output
Sample-and-Hold
Amplifier
BUSY
Analog Input
ADCLK
ADCEN
START
ANAIN[2:0]
SAMPLE/HOLD
Figure 36. Analog-to-Digital Converter Block Diagram
Operation
The ADC converts the analog input, ANAX, to a 10-bit digital representation. The equa-
tion for calculating the digital value is represented by:
ADC Output = 1024 x (ANAx ÷ VREF
)
Assuming zero gain and offset errors, any voltage outside the ADC input limits of AVSS
and VREF returns all 0s or 1s, respectively.
A new conversion can be initiated by either software write to the ADC Control Register’s
STARTbit or by PWM trigger. Refer to the Synchronization of PWM and Analog-to-Digi-
tal Converter section on page 73 for information about the PWM trigger.
Analog-to-Digital Converter
P R E L I M I N A R Y
PS024604-1005
ZILOG [ ZILOG, INC. ]
