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Z8FMC04100QKSG 参数 Datasheet PDF下载

Z8FMC04100QKSG图片预览
型号: Z8FMC04100QKSG
PDF下载: 下载PDF文件 查看货源
内容描述: Z8喝采-R电机控制闪存MCU [Z8 Encore-R Motor Control Flash MCUs]
分类和应用: 闪存微控制器和处理器外围集成电路电机时钟
文件页数/大小: 402 页 / 4558 K
品牌: ZILOG [ ZILOG, INC. ]
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Z8FMC16100 Series Flash MCU  
Product Specification  
127  
The transmitter can be enabled in this mode.  
LIN-UART Baud Rate Generator  
The LIN-UART Baud Rate Generator creates a lower frequency baud rate clock for data  
transmission. The input to the Baud Rate Generator is the system clock. The LIN-UART  
Baud Rate High and Low Byte registers combine to create a 16-bit baud rate divisor value  
(BRG[15:0]) that sets the data transmission rate (baud rate) of the LIN-UART. The LIN-  
UART data rate is calculated using the following equation for normal UART operation:  
System Clock Frequency (Hz)  
UART Data Rate (bits/s) =  
16 x UART Baud Rate Divisor Value  
The LIN-UART data rate is calculated using the following equation for LIN mode UART  
operation:  
System Clock Frequency (Hz)  
UART Data Rate (bits/s) =  
UART Baud Rate Divisor Value  
When the LIN-UART is disabled, the Baud Rate Generator can function as a basic 16-bit  
timer with interrupt on time-out. To configure the Baud Rate Generator as a timer with  
interrupt on time-out, complete the following procedure:  
1. Disable the LIN-UART receiver by clearing the RENbit in the LIN-UART Control 0  
Register to 0 (TENbit may be asserted, transmit activity may occur).  
2. Load the appropriate 16-bit count value into the LIN-UART Baud Rate High and Low  
Byte registers.  
3. Enable the Baud Rate Generator timer function and associated interrupt by setting the  
BRGCTLbit in the LIN-UART Control 1 Register to 1.  
Noise Filter  
A noise filter circuit is included which filters noise on a digital input signal (such as UART  
Receive Data) before the data is sampled by the block. This is likely to be a requirement  
for protocols with a noisy environment.  
The noise filter contains the following features:  
Synchronizes the receive input data to the System Clock  
Noise Filter Enable (NFEN) input selects whether the noise filter is bypassed (NFEN =  
0) or included (NFEN = 1) in the receive data path.  
PS024604-1005  
P R E L I M I N A R Y  
LIN-UART Baud Rate Generator  
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