Z8 Encore!® Motor Control Flash MCUs
Product Specification
112
Parity Checker
Rx IRQ
Receiver Control
with Address Compare
Receive Shifter
Receive Data
Register
RxD
Control Registers
System Bus
Baud Rate
Generator
Transmit Data
Register
Status Registers
Transmit Shift
Register
TxD
Transmitter Control
Tx IRQ
Parity Generator
CTS
DE
Figure 11. LIN-UART Block Diagram
Data Format for Standard UART Modes
The LIN-UART always transmits and receives data in an 8-bit data format, least-signifi-
cant bit first. An even or odd parity bit or multiprocessor address/data bit can be optionally
added to the data stream. Each character begins with an active low Start bit and ends with
either 1 or 2 active high Stop bits. Figures 12 and 13 illustrate the asynchronous data for-
mat employed by the LIN-UART without parity and with parity, respectively.
LIN-UART
P R E L I M I N A R Y
PS024604-1005
ZILOG [ ZILOG, INC. ]
