欢迎访问ic37.com |
会员登录 免费注册
发布采购

Z8FMC04100QKSG 参数 Datasheet PDF下载

Z8FMC04100QKSG图片预览
型号: Z8FMC04100QKSG
PDF下载: 下载PDF文件 查看货源
内容描述: Z8喝采-R电机控制闪存MCU [Z8 Encore-R Motor Control Flash MCUs]
分类和应用: 闪存微控制器和处理器外围集成电路电机时钟
文件页数/大小: 402 页 / 4558 K
品牌: ZILOG [ ZILOG, INC. ]
 浏览型号Z8FMC04100QKSG的Datasheet PDF文件第114页浏览型号Z8FMC04100QKSG的Datasheet PDF文件第115页浏览型号Z8FMC04100QKSG的Datasheet PDF文件第116页浏览型号Z8FMC04100QKSG的Datasheet PDF文件第117页浏览型号Z8FMC04100QKSG的Datasheet PDF文件第119页浏览型号Z8FMC04100QKSG的Datasheet PDF文件第120页浏览型号Z8FMC04100QKSG的Datasheet PDF文件第121页浏览型号Z8FMC04100QKSG的Datasheet PDF文件第122页  
Z8 Encore!® Motor Control Flash MCUs  
Product Specification  
96  
d. If using the Timer Output alternate function, set the initial output level (High or  
Low) via TPOL.  
2. Write to the Timer High and Low Byte registers to set the starting count value (usually  
0001h). This setting only affects the first pass in CONTINUOUS mode. After the first  
timer reload in CONTINUOUS mode, counting begins at the reset value of 0001h.  
3. Write to the Timer Reload High and Low Byte registers to set the reload period.  
4. If appropriate, enable the timer interrupt and set the timer interrupt priority by writing  
to the relevant interrupt registers.  
5. If using the Timer Output function, configure the associated GPIO port pin for the  
Timer Output alternate function.  
6. Write to the Timer Control 1 Register to enable the timer and initiate counting.  
The timer period is calculated by the following equation:  
Reload Value x Prescaler  
Continuous Mode Time-Out Period(s) =  
System Clock Frequency (Hz)  
If an initial starting value other than 0001his loaded into the Timer High and Low Byte  
registers, use the ONE-SHOT mode equation to determine the first time-out period.  
Counter and Comparator Counter Modes  
In COUNTER mode, the timer counts input transitions from a GPIO port pin. The Timer  
Input is taken from the associated GPIO port pin. The TPOLbit in the Timer Control 1  
Register selects whether the count occurs on the rising edge or the falling edge of the  
Timer Input signal. In COUNTER mode, the prescaler is disabled.  
The input frequency of the Timer Input signal must not exceed one-fourth the system  
clock frequency.  
Caution:  
In COMPARATOR COUNTER mode, the timer counts output transitions from an analog  
comparator output. Timer 0 takes its input from the output of the comparator. The TPOLbit  
in the Timer Control 1 Register selects whether the count occurs on the rising edge or the  
falling edge of the comparator output signal. In COMPARATOR COUNTER mode, the  
prescaler is disabled.  
The frequency of the comparator output signal must not exceed one-fourth the system  
clock frequency.  
Caution:  
General-Purpose Timer  
P R E L I M I N A R Y  
PS024604-1005  
 复制成功!