Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Z8 Encore!®
15
Table 2. Signal Descriptions (Continued)
Signal Mnemonic
Reset
I/O
Description
I
RESET. Generates a Reset when asserted (driven Low).
RESET
Power Supply
VDD
I
I
I
I
Power Supply.
Analog Power Supply.
Ground.
AVDD
VSS
AVSS
Analog Ground.
Pin Characteristics
Table 3 provides detailed information on the characteristics for each pin available on the
Z8F640x family products. Data in Table 3 is sorted alphabetically by the pin symbol mne-
monic.
Table 3. Pin Characteristics of the Z8F640x family
Active Low
or
Direction Direction Active High
Internal
Tri-State Pull-up or
Output Pull-down
Schmitt
Trigger
Input
Symbol
Mnemonic
Reset
Open Drain
Output
AVSS
N/A
N/A
I/O
N/A
N/A
I
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Yes
No
No
No
No
No
No
No
Yes
No
Yes
N/A
N/A
Yes
AVDD
DBG
VSS
N/A
I/O
N/A
I
N/A
Yes
N/A
PA[7:0]
Yes,
Programmable
PB[7:0]
PC[7:0]
PD[7:0]
PE7:0]
I/O
I/O
I/O
I/O
I
I
I
I
N/A
N/A
N/A
N/A
Yes
Yes
Yes
Yes
No
No
No
No
Yes
Yes
Yes
Yes
Yes,
Programmable
Yes,
Programmable
Yes,
Programmable
Yes,
Programmable
x represents integer 0, 1,... to indicate multiple pins with symbol mnemonics that differ only by the integer
PS017610-0404
Signal and Pin Descriptions
ZILOG [ ZILOG, INC. ]
