Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Z8 Encore!®
14
Table 2. Signal Descriptions (Continued)
Signal Mnemonic
I/O
Description
UART Controllers
TXD0 / TXD1
O
I
Transmit Data. These signals are the transmit outputs from the UARTs. The TXD
signals are multiplexed with general-purpose I/O pins.
RXD0 / RXD1
CTS0 / CTS1
Receive Data. These signals are the receiver inputs for the UARTs and IrDAs. The
RXD signals are multiplexed with general-purpose I/O pins.
I
Clear To Send. These signals are control inputs for the UARTs. The CTS signals
are multiplexed with general-purpose I/O pins.
Timers (Timer 3 is unavailable in the 40-and 44-pin packages)
T0OUT / T1OUT/
T2OUT / T3OUT
O
I
Timer Output 0-3. These signals are output pins from the timers. The Timer
Output signals are multiplexed with general-purpose I/O pins. T2OUT is not
supported in the 40-pin package. T3OUT is not supported in the 40- and 44-pin
packages.
T0IN / T1IN/
T2IN / T3IN
Timer Input 0-3. These signals are used as the capture, gating and counter inputs.
The Timer Input signals are multiplexed with general-purpose I/O pins. T3IN is
not supported in the 40- and 44-pin packages.
Analog
ANA[11:0]
I
I
Analog Input. These signals are inputs to the analog-to-digital converter (ADC).
The ADC analog inputs are multiplexed with general-purpose I/O pins.
VREF
Analog-to-digital converter reference voltage input. The VREF pin should be left
unconnected (or capacitively coupled to analog ground) if the internal voltage
reference is selected as the ADC reference voltage.
Oscillators
XIN
I
External Crystal Input. This is the input pin to the crystal oscillator. A crystal can
be connected between it and the XOUT pin to form the oscillator.
XOUT
O
External Crystal Output. This pin is the output of the crystal oscillator. A crystal
can be connected between it and the XIN pin to form the oscillator. When the
system clock is referred to in this manual, it refers to the frequency of the signal at
this pin.
RCOUT
O
RC Oscillator Output. This signal is the output of the RC oscillator. It is
multiplexed with a general-purpose I/O pin.
On-Chip Debugger
DBG
I/O
Debug. This pin is the control and data input and output to and from the On-Chip
Debugger. For operation of the On-chip debugger, all power pins (VDD and AVDD
must be supplied with power, and all ground pins (VSS and AVSS must be
grounded. This pin is open-drain and must have an external pull-up resistor to
ensure proper operation.
PS017610-0404
Signal and Pin Descriptions
ZILOG [ ZILOG, INC. ]
