Z8 Encore! XP® F08xA Series
Product Specification
153
Runtime Counter
The On-Chip Debugger contains a 16-bit Runtime Counter. It counts system clock cycles
between Breakpoints. The counter starts counting when the On-Chip Debugger leaves
DEBUG mode and stops counting when it enters DEBUG mode again or when it reaches
the maximum count of FFFFH.
On-Chip Debugger Commands
The host communicates to the On-Chip Debugger by sending OCD commands using the
DBG interface. During normal operation, only a subset of the OCD commands are avail-
able. In DEBUG mode, all OCD commands become available unless the user code and
control registers are protected by programming the Flash Read Protect Option bit (FRP).
The Flash Read Protect Option bit prevents the code in memory from being read out of the
Z8 Encore! XP® F08xA Series products. When this option is enabled, several of the OCD
commands are disabled. Table 99 on page 158 is a summary of the On-Chip Debugger
commands. Each OCD command is described in further detail in the bulleted list follow-
ing this table. Table 99 also indicates those commands that operate when the device is not
in DEBUG mode (normal operation) and those commands that are disabled by program-
ming the Flash Read Protect Option bit.
Command Enabled when NOT
Disabled by
Debug Command
Byte
00H
01H
02H
03H
04H
05H
06H
07H
08H
in DEBUG mode?
Flash Read Protect Option Bit
Read OCD Revision
Reserved
Yes
–
–
–
Read OCD Status Register
Read Runtime Counter
Write OCD Control Register
Read OCD Control Register
Write Program Counter
Read Program Counter
Write Register
Yes
–
–
–
Yes
Yes
–
Cannot clear DBGMODE bit
–
Disabled
Disabled
–
–
Only writes of the Flash Memory Control
registers are allowed. Additionally, only
the Mass Erase command is allowed to
be written to the Flash Control register.
Read Register
09H
0AH
0BH
–
–
–
Disabled
Disabled
Disabled
Write Program Memory
Read Program Memory
PS024705-0405
P R E L I M I N A R Y
On-Chip Debugger
ZILOG [ ZILOG, INC. ]
