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Z8F082ASH020SC 参数 Datasheet PDF下载

Z8F082ASH020SC图片预览
型号: Z8F082ASH020SC
PDF下载: 下载PDF文件 查看货源
内容描述: Z8喝采XP -R F08xA系列与扩展外设 [Z8 Encore XP-R F08xA Series with eXtended Peripherals]
分类和应用: 微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 244 页 / 2750 K
品牌: ZILOG [ ZILOG, INC. ]
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Z8 Encore! XP® F08xA Series  
Product Specification  
152  
If the OCD receives a Serial Break (nine or more continuous bits Low) the Auto-Baud  
Detector/Generator resets. Reconfigure the Auto-Baud Detector/Generator by sending  
80H.  
OCD Serial Errors  
The On-Chip Debugger can detect any of the following error conditions on the DBG pin:  
Serial Break (a minimum of nine continuous bits Low)  
Framing Error (received Stopbit is Low)  
Transmit Collision (OCD and host simultaneous transmission detected by the OCD)  
When the OCD detects one of these errors, it aborts any command currently in progress,  
transmits a four character long Serial Break back to the host, and resets the Auto-Baud  
Detector/Generator. A Framing Error or Transmit Collision may be caused by the host  
sending a Serial Break to the OCD. Because of the open-drain nature of the interface,  
returning a Serial Break break back to the host only extends the length of the Serial Break  
if the host releases the Serial Break early.  
The host transmits a Serial Break on the DBGpin when first connecting to the Z8 Encore!  
XP® F08xA Series devices or when recovering from an error. A Serial Break from the host  
resets the Auto-Baud Generator/Detector but does not reset the OCD Control register. A  
Serial Break leaves the device in DEBUG mode if that is the current mode. The OCD is  
held in Reset until the end of the Serial Break when the DBG pin returns High. Because of  
the open-drain nature of the DBG pin, the host can send a Serial Break to the OCD even if  
the OCD is transmitting a character.  
Breakpoints  
Execution Breakpoints are generated using the BRK instruction (opcode 00H). When the  
eZ8 CPU decodes a BRK instruction, it signals the On-Chip Debugger. If Breakpoints are  
enabled, the OCD enters DEBUG mode and idles the eZ8 CPU. If Breakpoints are not  
enabled, the OCD ignores the BRK signal and the BRKinstruction operates as an NOP  
instruction.  
Breakpoints in Flash Memory  
The BRKinstruction is opcode 00H, which corresponds to the fully programmed state of a  
byte in Flash memory. To implement a Breakpoint, write 00Hto the required break  
address, overwriting the current instruction. To remove a Breakpoint, the corresponding  
page of Flash memory must be erased and reprogrammed with the original data.  
PS024705-0405  
P R E L I M I N A R Y  
On-Chip Debugger  
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